fs.py revision 6135
12292SN/A# Copyright (c) 2006-2007 The Regents of The University of Michigan
22292SN/A# All rights reserved.
32292SN/A#
42292SN/A# Redistribution and use in source and binary forms, with or without
52292SN/A# modification, are permitted provided that the following conditions are
62292SN/A# met: redistributions of source code must retain the above copyright
72292SN/A# notice, this list of conditions and the following disclaimer;
82292SN/A# redistributions in binary form must reproduce the above copyright
92292SN/A# notice, this list of conditions and the following disclaimer in the
102292SN/A# documentation and/or other materials provided with the distribution;
112292SN/A# neither the name of the copyright holders nor the names of its
122292SN/A# contributors may be used to endorse or promote products derived from
132292SN/A# this software without specific prior written permission.
142292SN/A#
152292SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
162292SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
172292SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
182292SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
192292SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
202292SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
212292SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
222292SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
232292SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
242292SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
252292SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
262292SN/A#
272689Sktlim@umich.edu# Authors: Ali Saidi
282689Sktlim@umich.edu
292689Sktlim@umich.eduimport optparse, os, sys
302292SN/A
312292SN/Aimport m5
323326Sktlim@umich.edu
332733Sktlim@umich.eduif not m5.build_env['FULL_SYSTEM']:
342733Sktlim@umich.edu    m5.fatal("This script requires full-system mode (*_FS).")
352907Sktlim@umich.edu
362292SN/Afrom m5.objects import *
372292SN/Am5.AddToPath('../common')
382722Sktlim@umich.edufrom FSConfig import *
392669Sktlim@umich.edufrom SysPaths import *
402292SN/Afrom Benchmarks import *
412790Sktlim@umich.eduimport Simulation
422790Sktlim@umich.edufrom Caches import *
432790Sktlim@umich.edu
442790Sktlim@umich.edu# Get paths we might need.  It's expected this file is in m5/configs/example.
452669Sktlim@umich.educonfig_path = os.path.dirname(os.path.abspath(__file__))
462678Sktlim@umich.educonfig_root = os.path.dirname(config_path)
472678Sktlim@umich.edu
482678Sktlim@umich.eduparser = optparse.OptionParser()
492292SN/A
502678Sktlim@umich.edu# System options
512292SN/Aparser.add_option("--kernel", action="store", type="string")
522292SN/Aparser.add_option("--script", action="store", type="string")
532669Sktlim@umich.edu
542292SN/A# Benchmark options
552678Sktlim@umich.eduparser.add_option("--dual", action="store_true",
562292SN/A                  help="Simulate two systems attached with an ethernet link")
572678Sktlim@umich.eduparser.add_option("-b", "--benchmark", action="store", type="string",
582678Sktlim@umich.edu                  dest="benchmark",
592678Sktlim@umich.edu                  help="Specify the benchmark to run. Available benchmarks: %s"\
604319Sktlim@umich.edu                  % DefinedBenchmarks)
614319Sktlim@umich.edu
624319Sktlim@umich.edu# Metafile options
634319Sktlim@umich.eduparser.add_option("--etherdump", action="store", type="string", dest="etherdump",
644319Sktlim@umich.edu                  help="Specify the filename to dump a pcap capture of the" \
652678Sktlim@umich.edu                  "ethernet traffic")
662678Sktlim@umich.edu
672292SN/Aexecfile(os.path.join(config_root, "common", "Options.py"))
682678Sktlim@umich.edu
692678Sktlim@umich.edu(options, args) = parser.parse_args()
702678Sktlim@umich.edu
712678Sktlim@umich.eduif args:
724873Sstever@eecs.umich.edu    print "Error: script doesn't take any positional arguments"
732678Sktlim@umich.edu    sys.exit(1)
742292SN/A
752678Sktlim@umich.edu# driver system CPU is always simple... note this is an assignment of
762678Sktlim@umich.edu# a class, not an instance.
772678Sktlim@umich.eduDriveCPUClass = AtomicSimpleCPU
782678Sktlim@umich.edudrive_mem_mode = 'atomic'
792678Sktlim@umich.edu
802678Sktlim@umich.edu# system under test can be any CPU
812678Sktlim@umich.edu(TestCPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options)
822698Sktlim@umich.edu
832344SN/ATestCPUClass.clock = '2GHz'
842678Sktlim@umich.eduDriveCPUClass.clock = '2GHz'
852678Sktlim@umich.edu
862678Sktlim@umich.eduif options.benchmark:
872820Sktlim@umich.edu    try:
882678Sktlim@umich.edu        bm = Benchmarks[options.benchmark]
892678Sktlim@umich.edu    except KeyError:
902678Sktlim@umich.edu        print "Error benchmark %s has not been defined." % options.benchmark
912678Sktlim@umich.edu        print "Valid benchmarks are: %s" % DefinedBenchmarks
922678Sktlim@umich.edu        sys.exit(1)
932678Sktlim@umich.eduelse:
942678Sktlim@umich.edu    if options.dual:
952678Sktlim@umich.edu        bm = [SysConfig(), SysConfig()]
962344SN/A    else:
972307SN/A        bm = [SysConfig()]
982678Sktlim@umich.edu
994032Sktlim@umich.edunp = options.num_cpus
1002678Sktlim@umich.edu
1012292SN/Aif m5.build_env['TARGET_ISA'] == "alpha":
1022292SN/A    test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
1032292SN/Aelif m5.build_env['TARGET_ISA'] == "mips":
1042292SN/A    test_sys = makeLinuxMipsSystem(test_mem_mode, bm[0])
1052678Sktlim@umich.eduelif m5.build_env['TARGET_ISA'] == "sparc":
1062678Sktlim@umich.edu    test_sys = makeSparcSystem(test_mem_mode, bm[0])
1072292SN/Aelif m5.build_env['TARGET_ISA'] == "x86":
1082292SN/A    test_sys = makeLinuxX86System(test_mem_mode, np, bm[0])
1092292SN/Aelse:
1102292SN/A    m5.fatal("incapable of building non-alpha or non-sparc full system!")
1112292SN/A
1122292SN/Aif options.kernel is not None:
1134329Sktlim@umich.edu    test_sys.kernel = binary(options.kernel)
1144329Sktlim@umich.edu
1152292SN/Aif options.script is not None:
1164329Sktlim@umich.edu    test_sys.readfile = options.script
1174329Sktlim@umich.edu
1184329Sktlim@umich.eduif options.l2cache:
1194329Sktlim@umich.edu    test_sys.l2 = L2Cache(size = '2MB')
1202292SN/A    test_sys.tol2bus = Bus()
1212307SN/A    test_sys.l2.cpu_side = test_sys.tol2bus.port
1222307SN/A    test_sys.l2.mem_side = test_sys.membus.port
1232907Sktlim@umich.edu
1242907Sktlim@umich.edutest_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
1252292SN/A
1262292SN/Aif options.caches:
1272329SN/A    test_sys.bridge.filter_ranges_a=[AddrRange(0, Addr.max)]
1282329SN/A    test_sys.bridge.filter_ranges_b=[AddrRange(0, size='8GB')]
1292329SN/A    test_sys.iocache = IOCache(addr_range=AddrRange(0, size='8GB'))
1302292SN/A    test_sys.iocache.cpu_side = test_sys.iobus.port
1312292SN/A    test_sys.iocache.mem_side = test_sys.membus.port
1322292SN/A
1332292SN/Afor i in xrange(np):
1342292SN/A    if options.caches:
1352292SN/A        test_sys.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
1362292SN/A                                                L1Cache(size = '64kB'))
1372292SN/A    if options.l2cache:
1382292SN/A        test_sys.cpu[i].connectMemPorts(test_sys.tol2bus)
1392292SN/A    else:
1402292SN/A        test_sys.cpu[i].connectMemPorts(test_sys.membus)
1413492Sktlim@umich.edu
1422329SN/A    if options.fastmem:
1432292SN/A        test_sys.cpu[i].physmem_port = test_sys.physmem.port
1442292SN/A
1452292SN/Aif m5.build_env['TARGET_ISA'] == 'mips':
1462292SN/A    setMipsOptions(TestCPUClass)
1472292SN/A
1482292SN/Aif len(bm) == 2:
1492292SN/A    if m5.build_env['TARGET_ISA'] == 'alpha':
1502292SN/A        drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
1512292SN/A    elif m5.build_env['TARGET_ISA'] == 'mips':
1522292SN/A        drive_sys = makeLinuxMipsSystem(drive_mem_mode, bm[1])
1532292SN/A    elif m5.build_env['TARGET_ISA'] == 'sparc':
1542292SN/A        drive_sys = makeSparcSystem(drive_mem_mode, bm[1])
1552292SN/A    elif m5.build.env['TARGET_ISA'] == 'x86':
1562292SN/A        drive_sys = makeX86System(drive_mem_mode, np, bm[1])
1572292SN/A    drive_sys.cpu = DriveCPUClass(cpu_id=0)
1582292SN/A    drive_sys.cpu.connectMemPorts(drive_sys.membus)
1592292SN/A    if options.fastmem:
1602727Sktlim@umich.edu        drive_sys.cpu.physmem_port = drive_sys.physmem.port
1612727Sktlim@umich.edu    if options.kernel is not None:
1622727Sktlim@umich.edu        drive_sys.kernel = binary(options.kernel)
1632727Sktlim@umich.edu
1642727Sktlim@umich.edu    root = makeDualRoot(test_sys, drive_sys, options.etherdump)
1652727Sktlim@umich.eduelif len(bm) == 1:
1662727Sktlim@umich.edu    root = Root(system=test_sys)
1672727Sktlim@umich.eduelse:
1682727Sktlim@umich.edu    print "Error I don't know how to create more than 2 systems."
1692727Sktlim@umich.edu    sys.exit(1)
1702727Sktlim@umich.edu
1712727Sktlim@umich.eduSimulation.run(options, root, test_sys, FutureClass)
1722727Sktlim@umich.edu