fs.py revision 2948
19665Sandreas.hansson@arm.comimport optparse, os, sys 29665Sandreas.hansson@arm.com 39665Sandreas.hansson@arm.comimport m5 49665Sandreas.hansson@arm.comfrom m5.objects import * 59665Sandreas.hansson@arm.comfrom SysPaths import * 69665Sandreas.hansson@arm.comfrom FullO3Config import * 79665Sandreas.hansson@arm.com 89665Sandreas.hansson@arm.comparser = optparse.OptionParser() 99665Sandreas.hansson@arm.com 109665Sandreas.hansson@arm.comparser.add_option("-d", "--detailed", action="store_true") 119665Sandreas.hansson@arm.comparser.add_option("-t", "--timing", action="store_true") 129665Sandreas.hansson@arm.comparser.add_option("-m", "--maxtick", type="int") 135353Svilas.sridharan@gmail.comparser.add_option("--maxtime", type="float") 143395Shsul@eecs.umich.eduparser.add_option("--dual", help="Run full system using dual systems", 153395Shsul@eecs.umich.edu action="store_true") 163395Shsul@eecs.umich.edu 173395Shsul@eecs.umich.edu(options, args) = parser.parse_args() 183395Shsul@eecs.umich.edu 193395Shsul@eecs.umich.eduif args: 203395Shsul@eecs.umich.edu print "Error: script doesn't take any positional arguments" 213395Shsul@eecs.umich.edu sys.exit(1) 223395Shsul@eecs.umich.edu 233395Shsul@eecs.umich.edu# Base for tests is directory containing this file. 243395Shsul@eecs.umich.edutest_base = os.path.dirname(__file__) 253395Shsul@eecs.umich.edu 263395Shsul@eecs.umich.eduscript.dir = '/z/saidi/work/m5.newmem/configs/boot' 273395Shsul@eecs.umich.edu 283395Shsul@eecs.umich.edulinux_image = env.get('LINUX_IMAGE', disk('linux-latest.img')) 293395Shsul@eecs.umich.edu 303395Shsul@eecs.umich.educlass CowIdeDisk(IdeDisk): 313395Shsul@eecs.umich.edu image = CowDiskImage(child=RawDiskImage(read_only=True), 323395Shsul@eecs.umich.edu read_only=False) 333395Shsul@eecs.umich.edu 343395Shsul@eecs.umich.edu def childImage(self, ci): 353395Shsul@eecs.umich.edu self.image.child.image_file = ci 363395Shsul@eecs.umich.edu 373395Shsul@eecs.umich.educlass BaseTsunami(Tsunami): 383395Shsul@eecs.umich.edu ethernet = NSGigE(configdata=NSGigEPciData(), 393395Shsul@eecs.umich.edu pci_bus=0, pci_dev=1, pci_func=0) 403395Shsul@eecs.umich.edu etherint = NSGigEInt(device=Parent.ethernet) 418920Snilay@cs.wisc.edu ide = IdeController(disks=[Parent.disk0, Parent.disk2], 428920Snilay@cs.wisc.edu pci_func=0, pci_dev=0, pci_bus=0) 438920Snilay@cs.wisc.edu 448920Snilay@cs.wisc.educlass MyLinuxAlphaSystem(LinuxAlphaSystem): 457025SBrad.Beckmann@amd.com iobus = Bus(bus_id=0) 469520SAndreas.Sandberg@ARM.com membus = Bus(bus_id=1) 479665Sandreas.hansson@arm.com bridge = Bridge() 489520SAndreas.Sandberg@ARM.com physmem = PhysicalMemory(range = AddrRange('128MB')) 499520SAndreas.Sandberg@ARM.com bridge.side_a = iobus.port 509520SAndreas.Sandberg@ARM.com bridge.side_b = membus.port 519520SAndreas.Sandberg@ARM.com physmem.port = membus.port 529520SAndreas.Sandberg@ARM.com disk0 = CowIdeDisk(driveID='master') 539665Sandreas.hansson@arm.com disk2 = CowIdeDisk(driveID='master') 549665Sandreas.hansson@arm.com disk0.childImage(linux_image) 559665Sandreas.hansson@arm.com disk2.childImage(disk('linux-bigswap2.img')) 569665Sandreas.hansson@arm.com tsunami = BaseTsunami() 578920Snilay@cs.wisc.edu tsunami.attachIO(iobus) 588920Snilay@cs.wisc.edu tsunami.ide.pio = iobus.port 599520SAndreas.Sandberg@ARM.com tsunami.ide.dma = iobus.port 609520SAndreas.Sandberg@ARM.com tsunami.ide.config = iobus.port 619520SAndreas.Sandberg@ARM.com tsunami.ethernet.pio = iobus.port 628920Snilay@cs.wisc.edu tsunami.ethernet.dma = iobus.port 639520SAndreas.Sandberg@ARM.com tsunami.ethernet.config = iobus.port 648920Snilay@cs.wisc.edu simple_disk = SimpleDisk(disk=RawDiskImage(image_file = linux_image, 658920Snilay@cs.wisc.edu read_only = True)) 668920Snilay@cs.wisc.edu intrctrl = IntrControl() 679827Sakash.bagdia@arm.com if options.detailed: 689827Sakash.bagdia@arm.com cpu = DetailedO3CPU() 699827Sakash.bagdia@arm.com elif options.timing: 709827Sakash.bagdia@arm.com cpu = TimingSimpleCPU() 719790Sakash.bagdia@arm.com mem_mode = 'timing' 729790Sakash.bagdia@arm.com else: 739790Sakash.bagdia@arm.com cpu = AtomicSimpleCPU() 749790Sakash.bagdia@arm.com cpu.mem = membus 759789Sakash.bagdia@arm.com cpu.icache_port = membus.port 769789Sakash.bagdia@arm.com cpu.dcache_port = membus.port 779789Sakash.bagdia@arm.com cpu.itb = AlphaITB() 789800Snilay@cs.wisc.edu cpu.dtb = AlphaDTB() 799800Snilay@cs.wisc.edu cpu.clock = '2GHz' 809800Snilay@cs.wisc.edu sim_console = SimConsole(listener=ConsoleListener(port=3456)) 819800Snilay@cs.wisc.edu kernel = binary('vmlinux') 829800Snilay@cs.wisc.edu pal = binary('ts_osfpal') 839800Snilay@cs.wisc.edu console = binary('console') 849800Snilay@cs.wisc.edu boot_osflags = 'root=/dev/hda1 console=ttyS0' 859800Snilay@cs.wisc.edu 869800Snilay@cs.wisc.educlass TsunamiRoot(Root): 879800Snilay@cs.wisc.edu pass 889800Snilay@cs.wisc.edu 899800Snilay@cs.wisc.edudef DualRoot(clientSystem, serverSystem): 909800Snilay@cs.wisc.edu self = Root() 919836Sandreas.hansson@arm.com self.client = clientSystem 929836Sandreas.hansson@arm.com self.server = serverSystem 939800Snilay@cs.wisc.edu 949800Snilay@cs.wisc.edu self.etherdump = EtherDump(file='ethertrace') 959800Snilay@cs.wisc.edu self.etherlink = EtherLink(int1 = Parent.client.tsunami.etherint[0], 969800Snilay@cs.wisc.edu int2 = Parent.server.tsunami.etherint[0], 979800Snilay@cs.wisc.edu dump = Parent.etherdump) 989800Snilay@cs.wisc.edu self.clock = '1THz' 999800Snilay@cs.wisc.edu return self 1009800Snilay@cs.wisc.edu 1018920Snilay@cs.wisc.eduif options.dual: 1028920Snilay@cs.wisc.edu root = DualRoot( 1038920Snilay@cs.wisc.edu MyLinuxAlphaSystem(readfile=script('netperf-stream-nt-client.rcS')), 1048920Snilay@cs.wisc.edu MyLinuxAlphaSystem(readfile=script('netperf-server.rcS'))) 1058920Snilay@cs.wisc.eduelse: 1068920Snilay@cs.wisc.edu root = TsunamiRoot(clock = '1THz', system = MyLinuxAlphaSystem()) 1078920Snilay@cs.wisc.edu 1088920Snilay@cs.wisc.edum5.instantiate(root) 1098920Snilay@cs.wisc.edu 1108920Snilay@cs.wisc.edu#exit_event = m5.simulate(2600000000000) 1118920Snilay@cs.wisc.edu#if exit_event.getCause() != "user interrupt received": 1128920Snilay@cs.wisc.edu# m5.checkpoint(root, 'cpt') 1139800Snilay@cs.wisc.edu# exit_event = m5.simulate(300000000000) 1149800Snilay@cs.wisc.edu# if exit_event.getCause() != "user interrupt received": 1158920Snilay@cs.wisc.edu# m5.checkpoint(root, 'cptA') 1163395Shsul@eecs.umich.edu 1178920Snilay@cs.wisc.edu 1189909Snilay@cs.wisc.eduif options.maxtick: 1199816Sjthestness@gmail.com exit_event = m5.simulate(options.maxtick) 1209816Sjthestness@gmail.comelif options.maxtime: 1219816Sjthestness@gmail.com simtime = int(options.maxtime * root.clock.value) 1229816Sjthestness@gmail.com print "simulating for: ", simtime 1239816Sjthestness@gmail.com exit_event = m5.simulate(simtime) 1249816Sjthestness@gmail.comelse: 1259816Sjthestness@gmail.com exit_event = m5.simulate() 1269816Sjthestness@gmail.com 1279816Sjthestness@gmail.comprint 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause() 1288920Snilay@cs.wisc.edu