fs_bigLITTLE.py revision 11936:8ab45fd19f40
1# Copyright (c) 2016-2017 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Gabor Dozsa 37# Andreas Sandberg 38 39# This is an example configuration script for full system simulation of 40# a generic ARM bigLITTLE system. 41 42 43import argparse 44import os 45import sys 46import m5 47import m5.util 48from m5.objects import * 49 50m5.util.addToPath("../../") 51 52from common import SysPaths 53from common import CpuConfig 54 55import devices 56from devices import AtomicCluster, KvmCluster 57 58 59default_dtb = 'armv8_gem5_v1_big_little_2_2.dtb' 60default_kernel = 'vmlinux4.3.aarch64' 61default_disk = 'aarch64-ubuntu-trusty-headless.img' 62default_rcs = 'bootscript.rcS' 63 64default_mem_size= "2GB" 65 66def _to_ticks(value): 67 """Helper function to convert a latency from string format to Ticks""" 68 69 return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value)) 70 71def _using_pdes(root): 72 """Determine if the simulator is using multiple parallel event queues""" 73 74 for obj in root.descendants(): 75 if not m5.proxy.isproxy(obj.eventq_index) and \ 76 obj.eventq_index != root.eventq_index: 77 return True 78 79 return False 80 81 82class BigCluster(devices.CpuCluster): 83 def __init__(self, system, num_cpus, cpu_clock, 84 cpu_voltage="1.0V"): 85 cpu_config = [ CpuConfig.get("arm_detailed"), devices.L1I, devices.L1D, 86 devices.WalkCache, devices.L2 ] 87 super(BigCluster, self).__init__(system, num_cpus, cpu_clock, 88 cpu_voltage, *cpu_config) 89 90class LittleCluster(devices.CpuCluster): 91 def __init__(self, system, num_cpus, cpu_clock, 92 cpu_voltage="1.0V"): 93 cpu_config = [ CpuConfig.get("minor"), devices.L1I, devices.L1D, 94 devices.WalkCache, devices.L2 ] 95 super(LittleCluster, self).__init__(system, num_cpus, cpu_clock, 96 cpu_voltage, *cpu_config) 97 98 99def createSystem(caches, kernel, bootscript, disks=[]): 100 sys = devices.SimpleSystem(caches, default_mem_size, 101 kernel=SysPaths.binary(kernel), 102 readfile=bootscript, 103 machine_type="DTOnly") 104 105 sys.mem_ctrls = SimpleMemory(range=sys._mem_range) 106 sys.mem_ctrls.port = sys.membus.master 107 108 sys.connect() 109 110 # Attach disk images 111 if disks: 112 def cow_disk(image_file): 113 image = CowDiskImage() 114 image.child.image_file = SysPaths.disk(image_file) 115 return image 116 117 sys.disk_images = [ cow_disk(f) for f in disks ] 118 sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img)) 119 for img in sys.disk_images ] 120 for dev in sys.pci_vio_block: 121 sys.attach_pci(dev) 122 123 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary) 124 125 return sys 126 127cpu_types = { 128 "atomic" : (AtomicCluster, AtomicCluster), 129 "timing" : (BigCluster, LittleCluster), 130} 131 132# Only add the KVM CPU if it has been compiled into gem5 133if devices.have_kvm: 134 cpu_types["kvm"] = (KvmCluster, KvmCluster) 135 136 137def addOptions(parser): 138 parser.add_argument("--restore-from", type=str, default=None, 139 help="Restore from checkpoint") 140 parser.add_argument("--dtb", type=str, default=default_dtb, 141 help="DTB file to load") 142 parser.add_argument("--kernel", type=str, default=default_kernel, 143 help="Linux kernel") 144 parser.add_argument("--disk", action="append", type=str, default=[], 145 help="Disks to instantiate") 146 parser.add_argument("--bootscript", type=str, default=default_rcs, 147 help="Linux bootscript") 148 parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(), 149 default="timing", 150 help="CPU simulation mode. Default: %(default)s") 151 parser.add_argument("--kernel-init", type=str, default="/sbin/init", 152 help="Override init") 153 parser.add_argument("--big-cpus", type=int, default=1, 154 help="Number of big CPUs to instantiate") 155 parser.add_argument("--little-cpus", type=int, default=1, 156 help="Number of little CPUs to instantiate") 157 parser.add_argument("--caches", action="store_true", default=False, 158 help="Instantiate caches") 159 parser.add_argument("--last-cache-level", type=int, default=2, 160 help="Last level of caches (e.g. 3 for L3)") 161 parser.add_argument("--big-cpu-clock", type=str, default="2GHz", 162 help="Big CPU clock frequency") 163 parser.add_argument("--little-cpu-clock", type=str, default="1GHz", 164 help="Little CPU clock frequency") 165 parser.add_argument("--sim-quantum", type=str, default="1ms", 166 help="Simulation quantum for parallel simulation. " \ 167 "Default: %(default)s") 168 return parser 169 170def build(options): 171 m5.ticks.fixGlobalFrequency() 172 173 kernel_cmd = [ 174 "earlyprintk=pl011,0x1c090000", 175 "console=ttyAMA0", 176 "lpj=19988480", 177 "norandmaps", 178 "loglevel=8", 179 "mem=%s" % default_mem_size, 180 "root=/dev/vda1", 181 "rw", 182 "init=%s" % options.kernel_init, 183 "vmalloc=768MB", 184 ] 185 186 root = Root(full_system=True) 187 188 disks = [default_disk] if len(options.disk) == 0 else options.disk 189 system = createSystem(options.caches, 190 options.kernel, 191 options.bootscript, 192 disks=disks) 193 194 root.system = system 195 system.boot_osflags = " ".join(kernel_cmd) 196 197 if options.big_cpus + options.little_cpus == 0: 198 m5.util.panic("Empty CPU clusters") 199 200 big_model, little_model = cpu_types[options.cpu_type] 201 202 all_cpus = [] 203 # big cluster 204 if options.big_cpus > 0: 205 system.bigCluster = big_model(system, options.big_cpus, 206 options.big_cpu_clock) 207 system.mem_mode = system.bigCluster.memoryMode() 208 all_cpus += system.bigCluster.cpus 209 210 # little cluster 211 if options.little_cpus > 0: 212 system.littleCluster = little_model(system, options.little_cpus, 213 options.little_cpu_clock) 214 system.mem_mode = system.littleCluster.memoryMode() 215 all_cpus += system.littleCluster.cpus 216 217 # Figure out the memory mode 218 if options.big_cpus > 0 and options.little_cpus > 0 and \ 219 system.littleCluster.memoryMode() != system.littleCluster.memoryMode(): 220 m5.util.panic("Memory mode missmatch among CPU clusters") 221 222 223 # create caches 224 system.addCaches(options.caches, options.last_cache_level) 225 if not options.caches: 226 if options.big_cpus > 0 and system.bigCluster.requireCaches(): 227 m5.util.panic("Big CPU model requires caches") 228 if options.little_cpus > 0 and system.littleCluster.requireCaches(): 229 m5.util.panic("Little CPU model requires caches") 230 231 # Create a KVM VM and do KVM-specific configuration 232 if issubclass(big_model, KvmCluster): 233 _build_kvm(system, all_cpus) 234 235 # Linux device tree 236 system.dtb_filename = SysPaths.binary(options.dtb) 237 238 return root 239 240def _build_kvm(system, cpus): 241 system.kvm_vm = KvmVM() 242 243 # Assign KVM CPUs to their own event queues / threads. This 244 # has to be done after creating caches and other child objects 245 # since these mustn't inherit the CPU event queue. 246 if len(cpus) > 1: 247 device_eq = 0 248 first_cpu_eq = 1 249 for idx, cpu in enumerate(cpus): 250 # Child objects usually inherit the parent's event 251 # queue. Override that and use the same event queue for 252 # all devices. 253 for obj in cpu.descendants(): 254 obj.eventq_index = device_eq 255 cpu.eventq_index = first_cpu_eq + idx 256 257 258 259def instantiate(options, checkpoint_dir=None): 260 # Setup the simulation quantum if we are running in PDES-mode 261 # (e.g., when using KVM) 262 root = Root.getInstance() 263 if root and _using_pdes(root): 264 m5.util.inform("Running in PDES mode with a %s simulation quantum.", 265 options.sim_quantum) 266 root.sim_quantum = _to_ticks(options.sim_quantum) 267 268 # Get and load from the chkpt or simpoint checkpoint 269 if options.restore_from: 270 if checkpoint_dir and not os.path.isabs(options.restore_from): 271 cpt = os.path.join(checkpoint_dir, options.restore_from) 272 else: 273 cpt = options.restore_from 274 275 m5.util.inform("Restoring from checkpoint %s", cpt) 276 m5.instantiate(cpt) 277 else: 278 m5.instantiate() 279 280 281def run(checkpoint_dir=m5.options.outdir): 282 # start simulation (and drop checkpoints when requested) 283 while True: 284 event = m5.simulate() 285 exit_msg = event.getCause() 286 if exit_msg == "checkpoint": 287 print "Dropping checkpoint at tick %d" % m5.curTick() 288 cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick()) 289 m5.checkpoint(cpt_dir) 290 print "Checkpoint done." 291 else: 292 print exit_msg, " @ ", m5.curTick() 293 break 294 295 sys.exit(event.getCode()) 296 297 298def main(): 299 parser = argparse.ArgumentParser( 300 description="Generic ARM big.LITTLE configuration") 301 addOptions(parser) 302 options = parser.parse_args() 303 root = build(options) 304 instantiate(options) 305 run() 306 307 308if __name__ == "__m5_main__": 309 main() 310