Caches.py revision 9288
1# Copyright (c) 2012 ARM Limited
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13# Copyright (c) 2006-2007 The Regents of The University of Michigan
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17# modification, are permitted provided that the following conditions are
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38#
39# Authors: Lisa Hsu
40
41from m5.objects import *
42
43class L1Cache(BaseCache):
44    assoc = 2
45    block_size = 64
46    hit_latency = 2
47    response_latency = 2
48    mshrs = 10
49    tgts_per_mshr = 20
50    is_top_level = True
51
52class L2Cache(BaseCache):
53    assoc = 8
54    block_size = 64
55    hit_latency = 20
56    response_latency = 20
57    mshrs = 20
58    tgts_per_mshr = 12
59
60class PageTableWalkerCache(BaseCache):
61    assoc = 2
62    block_size = 64
63    hit_latency = 2
64    response_latency = 2
65    mshrs = 10
66    size = '1kB'
67    tgts_per_mshr = 12
68    is_top_level = True
69
70class IOCache(BaseCache):
71    assoc = 8
72    block_size = 64
73    hit_latency = 50
74    response_latency = 50
75    mshrs = 20
76    size = '1kB'
77    tgts_per_mshr = 12
78    forward_snoops = False
79    is_top_level = True
80