RISCV revision 11727
111723Sar4jc@virginia.eduTARGET_ISA = 'riscv' 211727Sar4jc@virginia.eduCPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,MinorCPU,O3CPU' 311723Sar4jc@virginia.eduPROTOCOL = 'MI_example' 4