RISCV revision 11727
11897Sstever@eecs.umich.eduTARGET_ISA = 'riscv' 24130Ssaidi@eecs.umich.eduCPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,MinorCPU,O3CPU' 31897Sstever@eecs.umich.eduPROTOCOL = 'MI_example' 41897Sstever@eecs.umich.edu