Searched refs:MISCREG_ID_ISAR5 (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Disa.cc328 miscRegs[MISCREG_ID_ISAR5] = p->id_isar5;
335 miscRegs[MISCREG_ID_ISAR5] = insertBits(
336 miscRegs[MISCREG_ID_ISAR5], 19, 4,
1086 case MISCREG_ID_ISAR5:
H A Dutility.cc518 case MISCREG_ID_ISAR5:
H A Dmiscregs.hh163 MISCREG_ID_ISAR5, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc188 return MISCREG_ID_ISAR5;
3152 InitReg(MISCREG_ID_ISAR5)
3927 .mapsTo(MISCREG_ID_ISAR5);
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc151 { "id_isar5", MISCREG_ID_ISAR5 },

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