Searched refs:MISCREG_DFSR (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Dfaults.hh478 static const MiscRegIndex FsrIndex = MISCREG_DFSR;
508 static const MiscRegIndex FsrIndex = MISCREG_DFSR;
H A Dutility.cc565 case MISCREG_DFSR:
677 case MISCREG_DFSR:
H A Dmiscregs.hh203 MISCREG_DFSR, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc1033 case MISCREG_DFSR:
H A Dmiscregs.cc299 return MISCREG_DFSR;
3269 InitReg(MISCREG_DFSR)

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