Searched hist:9285 (Results 1 - 25 of 37) sorted by relevance
/gem5/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/se/00.hello/ref/mips/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/10.mcf/ref/x86/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/20.parser/ref/arm/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/20.parser/ref/x86/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/30.eon/ref/arm/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/se/00.hello/ref/arm/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/se/00.hello/ref/x86/linux/simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/10.mcf/ref/arm/linux/o3-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/10.mcf/ref/x86/linux/o3-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/20.parser/ref/arm/linux/o3-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/30.eon/ref/arm/linux/o3-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/long/se/50.vortex/ref/arm/linux/o3-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
/gem5/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/ | ||
H A D | stats.txt | diff 9285:9901180cd573 Mon Oct 15 08:09:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Stats: Update stats for new default L1-to-L2 bus clock and width This patch updates the stats to reflect the changes in the clock speed and width for the bus connecting the L1 and L2 caches. |
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