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H A D | base.cc | diff 13747:5c90d834a58c Thu Nov 29 10:33:00 EST 2018 Daniel R. Carvalho <odanrc@yahoo.com.br> mem-cache: Fix recvTimingReq doWritebacks tick Before being sent to the writebuffer, the evicted blocks must be selected for replacement, and therefore the access latency must be applied. The forward latency is then applied on top of that delay. Change-Id: I16a25a8bf6051f63eb7a02fe66acb6af26d434fc Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/14736 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com> |
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