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| H A D | process.hh | diff 13121:4741df518ab8 Wed Sep 19 19:39:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> sim-se: Different HWCAP for ArmProcess32/64 AArch32 and AArch64 have different HWCAP flags in Linux, but we are currently using AArch32 HWCAP flags to initialize the aux vector of both AArch32 and AArch64 binaries. This patch also fixes a bug that was introduced by running in SE mode a target binary compiled with glibc > 2.18. Using AArch32 flags resulted on CPUID flag being set for AArch64. This incorrectly tells libc that emulation of the midr_el1 is supported. In FullSystem this might work, but since we are in Syscall Emulation there is no OS behind emulating the mrs midr_el1 instruction. By separating AArch32 flags from AArch64 flags we are turning off the CPUID hwcap flag in SE mode. Change-Id: I9f651957ba9d19dc2bc06606de070c6586f0f9fa Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/12884 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> |
| H A D | process.cc | diff 13121:4741df518ab8 Wed Sep 19 19:39:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> sim-se: Different HWCAP for ArmProcess32/64 AArch32 and AArch64 have different HWCAP flags in Linux, but we are currently using AArch32 HWCAP flags to initialize the aux vector of both AArch32 and AArch64 binaries. This patch also fixes a bug that was introduced by running in SE mode a target binary compiled with glibc > 2.18. Using AArch32 flags resulted on CPUID flag being set for AArch64. This incorrectly tells libc that emulation of the midr_el1 is supported. In FullSystem this might work, but since we are in Syscall Emulation there is no OS behind emulating the mrs midr_el1 instruction. By separating AArch32 flags from AArch64 flags we are turning off the CPUID hwcap flag in SE mode. Change-Id: I9f651957ba9d19dc2bc06606de070c6586f0f9fa Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/12884 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Brandon Potter <Brandon.Potter@amd.com> |
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