Searched defs:regIdx (Results 1 - 9 of 9) sorted by relevance
| /gem5/src/gpu-compute/ |
| H A D | vector_register_state.hh | 63 read(int regIdx, int threadId=0) { argument
77 write(unsigned int regIdx, T value, int threadId=0) { argument
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| H A D | condition_register_state.hh | 61 read(int regIdx, int threadId) argument
71 write(int regIdx, int threadId, T value) argument
77 markReg(int regIdx, uint8_t value) argument
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| H A D | vector_register_file.hh | 74 read(int regIdx, int threadId=0) argument
85 write(int regIdx, T value, int threadId=0) argument
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| H A D | vector_register_file.cc | 101 VectorRegisterFile::preMarkReg(int regIdx, uint32_t operandSize, uint8_t value) argument
111 VectorRegisterFile::markReg(int regIdx, uint32_t operandSize, uint8_t value) argument
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| H A D | compute_unit.hh | 222 registerEvent(uint32_t simdId, uint32_t regIdx, uint32_t operandSize, uint64_t when, uint8_t newStatus) argument
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| /gem5/src/arch/arm/ |
| H A D | utility.hh | 363 int regIdx; local
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| H A D | utility.cc | 700 decodeMrsMsrBankedReg(uint8_t sysM, bool r, bool &isIntReg, int ®Idx, argument
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| /gem5/src/arch/hsail/ |
| H A D | operand.hh | 106 unsigned regIdx; member in class:BaseRegOperand
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| /gem5/src/cpu/ |
| H A D | reg_class.hh | 83 RegIndex regIdx; member in class:RegId
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