Searched refs:ssid (Results 1 - 11 of 11) sorted by relevance

/gem5/src/dev/arm/
H A Dsmmu_v3_caches.hh109 uint32_t ssid; member in struct:SMMUTLB::Entry
127 const Entry *lookup(uint32_t sid, uint32_t ssid, Addr va,
129 const Entry *lookupAnyVA(uint32_t sid, uint32_t ssid,
133 void invalidateSSID(uint32_t sid, uint32_t ssid);
147 size_t pickSetIdx(uint32_t sid, uint32_t ssid) const;
246 uint32_t ssid; member in struct:ConfigCache::Entry
266 const Entry *lookup(uint32_t sid, uint32_t ssid, bool updStats=true);
269 void invalidateSSID(uint32_t sid, uint32_t ssid);
279 size_t pickSetIdx(uint32_t sid, uint32_t ssid) const;
H A Dsmmu_v3_transl.hh53 uint32_t ssid; // substreamId member in struct:SMMUTranslRequest
61 static SMMUTranslRequest prefetch(Addr addr, uint32_t sid, uint32_t ssid);
170 const StreamTableEntry &ste, uint32_t sid, uint32_t ssid);
172 uint32_t sid, uint32_t ssid);
H A Dsmmu_v3_caches.cc179 SMMUTLB::lookup(uint32_t sid, uint32_t ssid, argument
190 e.sid==sid && e.ssid==ssid)
213 SMMUTLB::lookupAnyVA(uint32_t sid, uint32_t ssid, bool updStats) argument
223 if (e.valid && e.sid==sid && e.ssid==ssid) {
248 lookup(incoming.sid, incoming.ssid, incoming.va, false);
261 SMMUTLB::invalidateSSID(uint32_t sid, uint32_t ssid) argument
263 Set &set = sets[pickSetIdx(sid, ssid)];
268 if (e.sid == sid && e.ssid
838 lookup(uint32_t sid, uint32_t ssid, bool updStats) argument
890 invalidateSSID(uint32_t sid, uint32_t ssid) argument
[all...]
H A Dsmmu_v3_transl.cc55 req.ssid = pkt->req->hasSubstreamId() ?
66 SMMUTranslRequest::prefetch(Addr addr, uint32_t sid, uint32_t ssid) argument
72 req.ssid = ssid;
318 ifc.microTLB->lookup(request.sid, request.ssid, request.addr);
322 DPRINTF(SMMUv3, "micro TLB miss vaddr=%#x sid=%#x ssid=%#x\n",
323 request.addr, request.sid, request.ssid);
329 "micro TLB hit vaddr=%#x amask=%#x sid=%#x ssid=%#x paddr=%#x\n",
330 request.addr, e->vaMask, request.sid, request.ssid, e->pa);
350 ifc.mainTLB->lookup(request.sid, request.ssid, reques
[all...]
H A Dsmmu_v3.cc435 DPRINTF(SMMUv3, "CMD_CFGI_CD sid=%#x ssid=%#x\n",
436 cmd.dw0.sid, cmd.dw0.ssid);
437 configCache.invalidateSSID(cmd.dw0.sid, cmd.dw0.ssid);
441 cmd.dw0.sid, cmd.dw0.ssid);
443 cmd.dw0.sid, cmd.dw0.ssid);
H A Dsmmu_v3_defs.hh356 Bitfield<31, 12> ssid; member in struct:SMMUCommand
/gem5/src/dev/
H A Ddma_device.hh153 uint32_t sid = 0, uint32_t ssid = 0);
161 uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay,
180 uint32_t sid, uint32_t ssid, Tick delay = 0)
183 sid, ssid, delay);
193 uint32_t sid, uint32_t ssid, Tick delay = 0)
196 sid, ssid, delay);
179 dmaWrite(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay = 0) argument
192 dmaRead(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay = 0) argument
H A DDevice.py92 ssid = Param.Unsigned(0, variable in class:DmaDevice
H A Ddma_device.cc58 uint32_t sid, uint32_t ssid)
64 defaultSSid(ssid)
123 : PioDevice(p), dmaPort(this, sys, p->sid, p->ssid)
154 uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay,
177 req->setSubStreamId(ssid);
57 DmaPort(ClockedObject *dev, System *s, uint32_t sid, uint32_t ssid) argument
153 dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay, Request::Flags flag) argument
/gem5/src/cpu/testers/traffic_gen/
H A Dbase.cc187 auto ssid = streamGenerator->pickSubStreamID(); local
192 pkt->req->setSubStreamId(ssid);
/gem5/src/mem/
H A Drequest.hh517 setSubStreamId(uint32_t ssid) argument
520 _substreamId = ssid;

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