Searched refs:getPaddr (Results 1 - 25 of 40) sorted by relevance

12

/gem5/src/arch/mips/
H A Dlocked_mem.hh80 xc->setMiscReg(MISCREG_LLADDR, req->getPaddr() & ~0xf);
84 req->contextId(), req->getPaddr() & ~0xf);
106 if (!lock_flag || (req->getPaddr() & ~0xf) != lock_addr) {
129 } else if ((req->getPaddr() & ~0xf) != lock_addr) {
/gem5/src/cpu/testers/memtest/
H A Dmemtest.cc141 auto remove_addr = outstandingAddrs.find(req->getPaddr());
147 req->getPaddr(), blockAlign(req->getPaddr()),
155 pkt->isWrite() ? "Write" : "Read", req->getPaddr());
159 uint8_t ref_data = referenceData[req->getPaddr()];
163 req->getPaddr(), blockAlign(req->getPaddr()), curTick(),
182 referenceData[req->getPaddr()] = pkt_data[0];
265 auto ref = referenceData.find(req->getPaddr());
267 referenceData[req->getPaddr()]
[all...]
/gem5/src/arch/riscv/
H A Dlocked_mem.hh92 locked_addr_stack.push(req->getPaddr() & ~0xF);
94 req->contextId(), req->getPaddr() & ~0xF);
115 req->getPaddr() & ~0xF);
120 || locked_addr_stack.top() != ((req->getPaddr() & ~0xF))) {
/gem5/src/arch/arm/
H A Dlocked_mem.hh96 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr());
99 req->getPaddr());
120 xc->getCpuPtr()->name(), req->getPaddr());
125 if (!lock_flag || (req->getPaddr() & cacheBlockMask) != lock_addr) {
H A Dvtophys.cc86 return std::make_pair(true, req->getPaddr());
91 return std::make_pair(true, req->getPaddr());
H A Dstage2_mmu.cc136 MemCmd::ReadReq, req->getPaddr(), numBytes, event, data,
/gem5/src/arch/alpha/
H A Dlocked_mem.hh90 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr() & ~0xf);
112 if (!lock_flag || (req->getPaddr() & ~0xf) != lock_addr) {
H A Dtlb.cc221 if (req->getPaddr() & PAddrUncachedBit43) {
223 if (PAddrIprSpace(req->getPaddr())) {
232 req->setPaddr(req->getPaddr() & PAddrUncachedMask);
411 if (req->getPaddr() & PAddrUncachedBit40)
412 req->setPaddr(req->getPaddr() | ULL(0xf0000000000));
414 req->setPaddr(req->getPaddr() & ULL(0xffffffffff));
443 if (req->getPaddr() & ~PAddrImplMask) {
507 if (req->getPaddr() & PAddrUncachedBit40)
508 req->setPaddr(req->getPaddr() | ULL(0xf0000000000));
510 req->setPaddr(req->getPaddr()
[all...]
/gem5/src/cpu/checker/
H A Dcpu.cc206 mem_req->getPaddr(), mem_req->getFlags());
207 pAddr = mem_req->getPaddr();
250 curTick(), unverifiedReq->getVaddr(), unverifiedReq->getPaddr(),
290 mem_req->getPaddr(), mem_req->getFlags());
291 pAddr = mem_req->getPaddr();
318 curTick(), unverifiedReq->getVaddr(), unverifiedReq->getPaddr(),
374 Addr unverifiedPAddr = unverified_req->getPaddr();
/gem5/src/cpu/
H A Dtranslation.hh123 mainReq->setPaddr(sreqLow->getPaddr());
179 getPaddr() const function in class:WholeTranslationState
181 return mainReq->getPaddr();
/gem5/src/gpu-compute/
H A Dfetch_unit.cc215 pkt->req->getPaddr());
243 pkt->req->getPaddr());
247 pkt->req->getPaddr());
265 wavefront->simdId, wavefront->wfSlotId, pkt->req->getPaddr(),
H A Dcompute_unit.cc677 index, pkt->req->getPaddr());
696 pkt->req->getPaddr());
731 pkt->req->getPaddr());
853 gpuDynInst->wfSlotId, index, pkt->req->getPaddr());
909 new_pkt->req->getPaddr());
935 pkt->req->getPaddr());
988 pkt->req->getPaddr(), index);
990 Addr paddr = pkt->req->getPaddr();
996 pkt->req->getPaddr(), index);
999 gpuDynInst->pAddr = pkt->req->getPaddr();
[all...]
/gem5/src/mem/cache/prefetch/
H A Dqueued.cc283 it->translationRequest->getPaddr());
284 Addr target_paddr = it->translationRequest->getPaddr();
293 it->createPkt(it->translationRequest->getPaddr(), blkSize,
377 pkt->req->getVaddr() : pkt->req->getPaddr();
390 target_paddr = positive_stride ? (pkt->req->getPaddr() + stride) :
391 (pkt->req->getPaddr() - stride);
H A Dbase.cc63 paddress(pkt->req->getPaddr()), cacheMiss(miss)
70 Addr offset = pkt->req->getPaddr() - pkt->getAddr();
224 PrefetchInfo pfi(pkt, pkt->req->getPaddr(), miss);
H A Dbase.hh184 Addr getPaddr() const function in class:BasePrefetcher::PrefetchInfo
H A Dspatio_temporal_memory_streaming.cc130 Addr paddr = pfi.getPaddr();
/gem5/src/mem/cache/
H A Dcache_blk.hh143 Addr req_low = req->getPaddr();
152 Addr req_low = req->getPaddr();
160 lowAddr(req->getPaddr()),
/gem5/src/mem/
H A Dabstract_mem.hh91 LockedAddr(const RequestPtr &req) : addr(mask(req->getPaddr())),
H A Dabstract_mem.cc213 Addr paddr = LockedAddr::mask(req->getPaddr());
244 Addr paddr = LockedAddr::mask(req->getPaddr());
H A Dpacket.hh805 addr = req->getPaddr();
827 addr = req->getPaddr() & ~(_blkSize - 1);
/gem5/src/cpu/testers/garnet_synthetic_traffic/
H A DGarnetSyntheticTraffic.cc134 pkt->req->getPaddr());
316 destination, req->getPaddr());
/gem5/src/cpu/minor/
H A Dlsq.cc145 return containsAddrRangeOf(request->getPaddr(), request->getSize(),
146 other_request->request->getPaddr(), other_request->request->getSize());
550 (fragment->hasPaddr() ? fragment->getPaddr() : 0));
578 request->setPaddr(fragmentRequests[0]->getPaddr());
787 request->request->getPaddr(), request->request->getSize(),
788 slot->request->getPaddr(), slot->request->getSize());
816 Addr load_addr = load->request->getPaddr();
817 Addr store_addr = store->request->getPaddr();
H A Dfetch1.cc262 response->request->getPaddr() : 0),
412 request->getVaddr(), request->getPaddr());
/gem5/src/cpu/o3/
H A Dlsq_impl.hh788 _inst->physEffAddr = req->getPaddr();
830 _inst->physEffAddr = request(0)->getPaddr();
1152 return ( (LSQRequest::_requests[0]->getPaddr() & blockMask) == blockAddr);
1161 if ((r->getPaddr() & blockMask) == blockAddr) {
/gem5/src/cpu/o3/probe/
H A Delastic_trace.cc153 req->getPC(), req->getVaddr(), req->getPaddr(),
163 inst_fetch_pkt.set_addr(req->getPaddr());

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