/gem5/src/arch/mips/ |
H A D | locked_mem.hh | 80 xc->setMiscReg(MISCREG_LLADDR, req->getPaddr() & ~0xf); 84 req->contextId(), req->getPaddr() & ~0xf); 106 if (!lock_flag || (req->getPaddr() & ~0xf) != lock_addr) { 129 } else if ((req->getPaddr() & ~0xf) != lock_addr) {
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/gem5/src/cpu/testers/memtest/ |
H A D | memtest.cc | 141 auto remove_addr = outstandingAddrs.find(req->getPaddr()); 147 req->getPaddr(), blockAlign(req->getPaddr()), 155 pkt->isWrite() ? "Write" : "Read", req->getPaddr()); 159 uint8_t ref_data = referenceData[req->getPaddr()]; 163 req->getPaddr(), blockAlign(req->getPaddr()), curTick(), 182 referenceData[req->getPaddr()] = pkt_data[0]; 265 auto ref = referenceData.find(req->getPaddr()); 267 referenceData[req->getPaddr()] [all...] |
/gem5/src/arch/riscv/ |
H A D | locked_mem.hh | 92 locked_addr_stack.push(req->getPaddr() & ~0xF); 94 req->contextId(), req->getPaddr() & ~0xF); 115 req->getPaddr() & ~0xF); 120 || locked_addr_stack.top() != ((req->getPaddr() & ~0xF))) {
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/gem5/src/arch/arm/ |
H A D | locked_mem.hh | 96 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr()); 99 req->getPaddr()); 120 xc->getCpuPtr()->name(), req->getPaddr()); 125 if (!lock_flag || (req->getPaddr() & cacheBlockMask) != lock_addr) {
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H A D | vtophys.cc | 86 return std::make_pair(true, req->getPaddr()); 91 return std::make_pair(true, req->getPaddr());
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H A D | stage2_mmu.cc | 136 MemCmd::ReadReq, req->getPaddr(), numBytes, event, data,
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/gem5/src/arch/alpha/ |
H A D | locked_mem.hh | 90 xc->setMiscReg(MISCREG_LOCKADDR, req->getPaddr() & ~0xf); 112 if (!lock_flag || (req->getPaddr() & ~0xf) != lock_addr) {
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H A D | tlb.cc | 221 if (req->getPaddr() & PAddrUncachedBit43) { 223 if (PAddrIprSpace(req->getPaddr())) { 232 req->setPaddr(req->getPaddr() & PAddrUncachedMask); 411 if (req->getPaddr() & PAddrUncachedBit40) 412 req->setPaddr(req->getPaddr() | ULL(0xf0000000000)); 414 req->setPaddr(req->getPaddr() & ULL(0xffffffffff)); 443 if (req->getPaddr() & ~PAddrImplMask) { 507 if (req->getPaddr() & PAddrUncachedBit40) 508 req->setPaddr(req->getPaddr() | ULL(0xf0000000000)); 510 req->setPaddr(req->getPaddr() [all...] |
/gem5/src/cpu/checker/ |
H A D | cpu.cc | 206 mem_req->getPaddr(), mem_req->getFlags()); 207 pAddr = mem_req->getPaddr(); 250 curTick(), unverifiedReq->getVaddr(), unverifiedReq->getPaddr(), 290 mem_req->getPaddr(), mem_req->getFlags()); 291 pAddr = mem_req->getPaddr(); 318 curTick(), unverifiedReq->getVaddr(), unverifiedReq->getPaddr(), 374 Addr unverifiedPAddr = unverified_req->getPaddr();
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/gem5/src/cpu/ |
H A D | translation.hh | 123 mainReq->setPaddr(sreqLow->getPaddr()); 179 getPaddr() const function in class:WholeTranslationState 181 return mainReq->getPaddr();
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/gem5/src/gpu-compute/ |
H A D | fetch_unit.cc | 215 pkt->req->getPaddr()); 243 pkt->req->getPaddr()); 247 pkt->req->getPaddr()); 265 wavefront->simdId, wavefront->wfSlotId, pkt->req->getPaddr(),
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H A D | compute_unit.cc | 677 index, pkt->req->getPaddr()); 696 pkt->req->getPaddr()); 731 pkt->req->getPaddr()); 853 gpuDynInst->wfSlotId, index, pkt->req->getPaddr()); 909 new_pkt->req->getPaddr()); 935 pkt->req->getPaddr()); 988 pkt->req->getPaddr(), index); 990 Addr paddr = pkt->req->getPaddr(); 996 pkt->req->getPaddr(), index); 999 gpuDynInst->pAddr = pkt->req->getPaddr(); [all...] |
/gem5/src/mem/cache/prefetch/ |
H A D | queued.cc | 283 it->translationRequest->getPaddr()); 284 Addr target_paddr = it->translationRequest->getPaddr(); 293 it->createPkt(it->translationRequest->getPaddr(), blkSize, 377 pkt->req->getVaddr() : pkt->req->getPaddr(); 390 target_paddr = positive_stride ? (pkt->req->getPaddr() + stride) : 391 (pkt->req->getPaddr() - stride);
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H A D | base.cc | 63 paddress(pkt->req->getPaddr()), cacheMiss(miss) 70 Addr offset = pkt->req->getPaddr() - pkt->getAddr(); 224 PrefetchInfo pfi(pkt, pkt->req->getPaddr(), miss);
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H A D | base.hh | 184 Addr getPaddr() const function in class:BasePrefetcher::PrefetchInfo
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H A D | spatio_temporal_memory_streaming.cc | 130 Addr paddr = pfi.getPaddr();
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/gem5/src/mem/cache/ |
H A D | cache_blk.hh | 143 Addr req_low = req->getPaddr(); 152 Addr req_low = req->getPaddr(); 160 lowAddr(req->getPaddr()),
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/gem5/src/mem/ |
H A D | abstract_mem.hh | 91 LockedAddr(const RequestPtr &req) : addr(mask(req->getPaddr())),
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H A D | abstract_mem.cc | 213 Addr paddr = LockedAddr::mask(req->getPaddr()); 244 Addr paddr = LockedAddr::mask(req->getPaddr());
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H A D | packet.hh | 805 addr = req->getPaddr(); 827 addr = req->getPaddr() & ~(_blkSize - 1);
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/gem5/src/cpu/testers/garnet_synthetic_traffic/ |
H A D | GarnetSyntheticTraffic.cc | 134 pkt->req->getPaddr()); 316 destination, req->getPaddr());
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/gem5/src/cpu/minor/ |
H A D | lsq.cc | 145 return containsAddrRangeOf(request->getPaddr(), request->getSize(), 146 other_request->request->getPaddr(), other_request->request->getSize()); 550 (fragment->hasPaddr() ? fragment->getPaddr() : 0)); 578 request->setPaddr(fragmentRequests[0]->getPaddr()); 787 request->request->getPaddr(), request->request->getSize(), 788 slot->request->getPaddr(), slot->request->getSize()); 816 Addr load_addr = load->request->getPaddr(); 817 Addr store_addr = store->request->getPaddr();
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H A D | fetch1.cc | 262 response->request->getPaddr() : 0), 412 request->getVaddr(), request->getPaddr());
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/gem5/src/cpu/o3/ |
H A D | lsq_impl.hh | 788 _inst->physEffAddr = req->getPaddr(); 830 _inst->physEffAddr = request(0)->getPaddr(); 1152 return ( (LSQRequest::_requests[0]->getPaddr() & blockMask) == blockAddr); 1161 if ((r->getPaddr() & blockMask) == blockAddr) {
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/gem5/src/cpu/o3/probe/ |
H A D | elastic_trace.cc | 153 req->getPC(), req->getVaddr(), req->getPaddr(), 163 inst_fetch_pkt.set_addr(req->getPaddr());
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