| /gem5/src/arch/riscv/ |
| H A D | locked_mem.hh | 76 std::stack<Addr>& locked_addr_stack = locked_addrs[xc->contextId()];
90 std::stack<Addr>& locked_addr_stack = locked_addrs[xc->contextId()];
94 req->contextId(), req->getPaddr() & ~0xF);
104 std::stack<Addr>& locked_addr_stack = locked_addrs[xc->contextId()];
111 DPRINTF(LLSC, "[cid:%d]: locked_addrs empty? %s.\n", req->contextId(),
114 DPRINTF(LLSC, "[cid:%d]: addr = %x.\n", req->contextId(),
116 DPRINTF(LLSC, "[cid:%d]: last locked addr = %x.\n", req->contextId(),
126 curTick(), xc->contextId(), stCondFailures);
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| H A D | isa.cc | 116 return tc->contextId();
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| /gem5/src/arch/mips/ |
| H A D | locked_mem.hh | 84 req->contextId(), req->getPaddr() & ~0xf);
122 curTick(), xc->contextId(), stCondFailures);
128 req->contextId());
132 req->contextId());
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| /gem5/src/mem/ |
| H A D | abstract_mem.hh | 79 const ContextID contextId; member in class:LockedAddr
86 assert(contextId != InvalidContextID);
88 return (contextId == req->contextId());
92 contextId(req->contextId())
96 LockedAddr(Addr _addr, int _cid) : addr(_addr), contextId(_cid)
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| H A D | abstract_mem.cc | 223 req->contextId(), paddr);
231 req->contextId(), paddr);
265 req->contextId(), paddr);
285 i->contextId, paddr);
286 ContextID owner_cid = i->contextId;
289 req->contextId() :
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| /gem5/src/arch/sparc/ |
| H A D | pagetable.cc | 43 SERIALIZE_SCALAR(range.contextId);
60 UNSERIALIZE_SCALAR(range.contextId);
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| H A D | tlb_map.hh | 62 (r.real || r.contextId == i->first.contextId))
73 if (!r.real && r.contextId != i->first.contextId)
159 i->first.contextId << " " << i->first.partitionId << " " <<
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| H A D | pagetable.hh | 187 int contextId; member in struct:SparcISA::TlbRange
200 if (contextId < r2.contextId)
202 else if (contextId > r2.contextId)
221 contextId == r2.contextId &&
256 range.contextId = asn;
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| H A D | ua2005.cc | 290 assert(sys->numContexts() > tc->contextId());
292 temp |= tc->contextId() << STS::shft_id;
294 for (x = tc->contextId() & ~3; x < sys->threadContexts.size(); x++) {
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| /gem5/src/mem/cache/ |
| H A D | cache_blk.hh | 135 ContextID contextId; // locking context member in class:CacheBlk::Lock
145 return (contextId == req->contextId()) &&
159 : contextId(req->contextId()),
333 if (l->intersects(req) && l->contextId != req->contextId()) {
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| /gem5/src/dev/arm/ |
| H A D | base_gic.cc | 105 ContextID cid = tc->contextId();
145 return threadContext->contextId();
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| H A D | gic_v3.cc | 115 pkt->req->contextId(), daddr, size, is_secure_access, resp);
125 redist->processorNumber(), pkt->req->contextId(), daddr, size,
150 pkt->req->contextId(), daddr, size, is_secure_access, data);
159 redist->processorNumber(), pkt->req->contextId(), daddr, size,
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| H A D | vgic.cc | 101 ContextID ctx_id = pkt->req->contextId();
148 ContextID ctx_id = pkt->req->contextId();
242 ContextID ctx_id = pkt->req->contextId();
291 ContextID ctx_id = pkt->req->contextId();
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| H A D | timer_cpulocal.cc | 97 ContextID cpu_id = pkt->req->contextId();
175 ContextID cpu_id = pkt->req->contextId();
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| /gem5/src/arch/alpha/ |
| H A D | locked_mem.hh | 127 xc->contextId(), stCondFailures);
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| /gem5/src/base/ |
| H A D | cp_annotate.cc | 205 add(OP_LINK, FL_NONE, tc->contextId(), prev_smi, smi);
247 add(OP_BEGIN, FL_NONE, tc->contextId(), smi, sti);
261 doSwSmEnd(sys, tc->contextId(), sm, getFrame(tc));
334 swBegin(tc->getSystemPtr(), tc->contextId(), st, getFrame(tc), true, args[0]);
356 swBegin(tc->getSystemPtr(), tc->contextId(), sym, getFrame(tc));
418 add(OP_BEGIN, FL_NONE, tc->contextId(), smi, sti);
450 doQ(sys, FL_NONE, tc->contextId(), smi, q, qi, count);
479 doDq(sys, FL_NONE, tc->contextId(), smi, q, qi, count);
514 add(OP_PEEK, FL_NONE, tc->contextId(), smi, qi, count);
544 add(OP_RESERVE, FL_NONE, tc->contextId(), sm
[all...] |
| /gem5/src/cpu/ |
| H A D | thread_state.hh | 74 ContextID contextId() const { return _contextId; } function in struct:ThreadState
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| H A D | thread_context.cc | 124 const ContextID cid1 = one->contextId();
125 const ContextID cid2 = two->contextId();
256 ntc.setContextId(otc.contextId());
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| H A D | simple_thread.cc | 137 _contextId = oldContext->contextId();
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| H A D | base.cc | 484 tc->getProcessPtr()->assignThreadContext(tc->contextId());
614 assert(newTC->contextId() == oldTC->contextId());
616 system->replaceThreadContext(newTC, newTC->contextId());
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| /gem5/src/arch/arm/ |
| H A D | locked_mem.hh | 142 xc->contextId(), stCondFailures);
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| /gem5/src/cpu/checker/ |
| H A D | cpu.cc | 164 tc->contextId());
170 tc->contextId());
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| /gem5/src/mem/ruby/system/ |
| H A D | VIPERCoalescer.cc | 109 insertKernel(pkt->req->contextId(), pkt);
118 insertKernel(pkt->req->contextId(), pkt);
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| /gem5/src/cpu/o3/ |
| H A D | lsq.hh | 110 ContextID contextId() { return inst->contextId(); } function in class:LSQ::LSQSenderState
415 _inst->instAddr(), _inst->contextId(),
1123 ThreadID tid = cpu->contextToThread(req->request()->contextId());
1132 ThreadID tid = cpu->contextToThread(req->request()->contextId());
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| /gem5/ext/sst/ |
| H A D | ExtSlave.cc | 124 if (pkt->req->hasContextId()) ev->setGroupId(pkt->req->contextId());
|