Searched refs:Unknown (Results 1 - 10 of 10) sorted by relevance

/gem5/src/arch/sparc/insts/
H A Dunknown.hh41 * Class for Unknown/Illegal instructions
43 class Unknown : public SparcStaticInst class in namespace:SparcISA
48 Unknown(ExtMachInst _machInst) : function in class:SparcISA::Unknown
61 return "Unknown instruction";
/gem5/src/arch/riscv/insts/
H A Dunknown.hh52 class Unknown : public RiscvStaticInst class in namespace:RiscvISA
55 Unknown(MachInst _machInst) function in class:RiscvISA::Unknown
/gem5/src/systemc/ext/utils/
H A Dendian.hh43 # error Unknown machine endianness detected.
/gem5/ext/pybind11/tests/
H A Dtest_tagbased_polymorphic.cpp16 Unknown = 0, member in class:Animal::Kind
83 case Kind::Unknown: break;
/gem5/src/mem/
H A Drequest.hh77 Unknown = 1024, enumerator in enum:ContextSwitchTaskId::TaskId
403 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
412 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
429 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
439 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
450 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
462 _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
/gem5/src/arch/arm/insts/
H A Dmacromem.cc502 // Unknown number of registers
503 microOps[uopIdx++] = new Unknown(machInst);
540 microOps[uopIdx++] = new Unknown(machInst);
641 microOps[uopIdx++] = new Unknown(machInst);
685 microOps[uopIdx++] = new Unknown(machInst);
721 microOps[uopIdx++] = new Unknown(machInst);
758 microOps[uopIdx++] = new Unknown(machInst);
802 microOps[uopIdx++] = new Unknown(machInst);
809 microOps[uopIdx++] = new Unknown(machInst);
869 microOps[uopIdx++] = new Unknown(machIns
[all...]
/gem5/util/dist/
H A Dgem5-dist.sh162 echo "Unknown arg: $1"
/gem5/src/arch/arm/linux/
H A Dsystem.cc272 taskMap[pid] = ContextSwitchTaskId::Unknown;
/gem5/src/mem/cache/
H A Dcache_blk.hh217 task_id = ContextSwitchTaskId::Unknown;
/gem5/src/cpu/
H A Dbase.cc132 _taskId(ContextSwitchTaskId::Unknown), _pid(invldPid),

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