Searched refs:tl (Results 1 - 9 of 9) sorted by relevance
/gem5/src/arch/sparc/ |
H A D | isa.cc | 136 tl = 0; 191 * secContext | priContext | |tl|partid| |||||^hpriv 204 bits((uint64_t)tl,2,0) << 16 | 239 return tpc[tl-1]; 241 return tnpc[tl-1]; 243 return tstate[tl-1]; 245 return tt[tl-1]; 253 return tl; 276 return htstate[tl-1]; 426 tpc[tl [all...] |
H A D | utility.cc | 71 uint8_t tl = src->readMiscRegNoEffect(MISCREG_TL); local 89 dest->setMiscRegNoEffect(MISCREG_TL, tl); 90 src->setMiscRegNoEffect(MISCREG_TL, tl);
|
H A D | isa.hh | 78 uint8_t tl; // Trap Level member in class:SparcISA::ISA
|
H A D | faults.cc | 510 RegVal tl = tc->readMiscRegNoEffect(MISCREG_TL); local 527 if (hpstate.red || (tl == MaxTL - 1)) { 533 } else if (tl == MaxTL) { 538 } else if (tl > MaxPTL && level == Privileged) { 548 getPrivVector(tc, PC, NPC, trapType(), tl + 1); 615 tt[tl] = _trapType;
|
H A D | ua2005.cc | 78 "tpc", "tnpc", "tstate", "tt", "privtick", "tba", "pstate", "tl", 217 if (newVal.tlz && tl == 0 && !newVal.hpriv)
|
H A D | tlb.cc | 452 int tl = bits(tlbdata,18,16); 462 if (tl > 0) { 609 int tl = bits(tlbdata,18,16); local 623 if (tl > 0) {
|
/gem5/src/arch/mips/ |
H A D | pra_constants.hh | 253 Bitfield<23, 20> tl; member in namespace:MipsISA 273 Bitfield<0> tl; member in namespace:MipsISA
|
H A D | isa.cc | 232 cfg2.tl = cp.CP0_Config2_TL; 254 cfg3.tl = cp.CP0_Config3_TL;
|
/gem5/src/arch/riscv/ |
H A D | pra_constants.hh | 253 Bitfield<23, 20> tl; member in namespace:RiscvISA 273 Bitfield<0> tl; member in namespace:RiscvISA
|
Completed in 22 milliseconds