Searched refs:targets (Results 1 - 11 of 11) sorted by relevance

/gem5/src/mem/cache/
H A Dmshr.cc268 targets.init(blkAddr, blkSize);
275 targets.add(target, when_ready, _order, source, true, alloc_on_fill);
277 // All targets must refer to the same block
278 assert(target->matchBlockAddr(targets.front().pkt, blkSize));
289 targets.clearDownstreamPending();
298 pendingModified = targets.needsWritable || pending_modified_resp;
304 targets.clearDownstreamPending();
316 assert(targets.empty());
317 targets.resetFlags();
336 // - there are other targets alread
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H A Dwrite_queue_entry.hh112 TargetList targets; member in class:WriteQueueEntry
137 * Returns the current number of allocated targets.
138 * @return The current number of allocated targets.
141 { return targets.size(); }
144 * Returns true if there are targets left.
145 * @return true if there are targets
147 bool hasTargets() const { return !targets.empty(); }
156 return &targets.front();
164 targets.pop_front();
H A Dwrite_queue_entry.cc105 panic_if(!_isUncacheable && !targets.empty(),
114 targets.add(target, when_ready, _order);
116 // All targets must refer to the same block
117 assert(target->matchBlockAddr(targets.front().pkt, blkSize));
123 assert(targets.empty());
132 // targets since that's where the actual data lies.
137 return targets.trySatisfyFunctional(pkt);
179 targets.print(os, verbosity, prefix + " ");
H A Dmshr.hh98 * targets with needsWritable set will be able to be satisfied, or
151 * targets).
216 * Goes through the list of targets and uses them to populate
273 * @param markPending Set for deferred targets or pending MSHRs
282 * Used to rejig ordering between targets waiting on an MSHR. */
306 /** Address of the cache block for this list of targets. */
336 bool needsWritable() const { return targets.needsWritable; }
339 PacketPtr pkt = targets.front().pkt;
358 return targets.allocOnFill;
364 * @return true if any of the targets i
395 TargetList targets; variable
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H A Dnoncoherent_cache.cc251 MSHR::TargetList targets = mshr->extractServiceableTargets(pkt); local
252 for (auto &target: targets) {
314 // there should be no deferred targets and all the non-deferred
315 // targets are now serviced.
H A Dcache.cc701 MSHR::TargetList targets = mshr->extractServiceableTargets(pkt); local
702 for (auto &target: targets) {
872 maintainClusivity(targets.hasFromCache, blk);
/gem5/util/
H A Dregress56 help="comma-separated build targets to test (default: '%default')")
114 targets = []
116 # start with compile-only targets, if any
118 targets += ['%s/%s/gem5.%s' % (options.build_dir, build, variant)
128 # set up test targets for scons, since we don't have any quick SPARC
130 targets += ['%s/%s/tests/%s/%s/%s' % (options.build_dir, build, variant, test,
168 cmd = 'scons --ignore-style %s %s' % (scons_opts, ' '.join(targets))
/gem5/tests/gem5/
H A Dfixture.py120 Fixture will wait until all SCons targets are collected and tests are
122 targets.
142 if not self.targets:
144 'No SCons targets specified, this will'
150 'Building the following targets.'
152 log.test_log.message('%s' % (', '.join(self.targets)))
157 command.extend(self.targets)
174 self.targets = [self.target]
190 self.targets = []
195 targets
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/gem5/src/systemc/tests/systemc/1666-2011-compliance/sc_vector/
H A Dsc_vector.cpp159 sc_vector<Target> targets; member in struct:M
197 , targets("targets", N)
220 initiator->ports.bind( sc_assemble_vector(targets, &Target::xp) );
/gem5/src/systemc/tests/tlm/endian_conv/
H A Dtestall.py374 targets = [l.split()[-1] for l in tmp if l[:11] == " target = "]
379 if len(targets) != len(convs): raise SystemCFailure("\n" + txtin + txtout)
384 ms_out.target = targets[0]
386 if initiators[i]!=ms_out.initiator or targets[i]!=ms_out.target:
/gem5/src/systemc/tests/
H A Dverify.py130 targets = list([test.full_path() for test in tests])
139 'USE_SYSTEMC=1' ] + list(self.args) + targets

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