Searched refs:sysM (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/arm/
H A Dutility.cc700 decodeMrsMsrBankedReg(uint8_t sysM, bool r, bool &isIntReg, int &regIdx, argument
711 switch (sysM)
746 int sysM4To3 = bits(sysM, 4, 3);
750 regIdx = intRegInMode(mode, bits(sysM, 2, 0) + 8);
753 regIdx = intRegInMode(mode, bits(sysM, 2, 0) + 8);
755 if (bits(sysM, 1) == 0) {
757 regIdx = intRegInMode(mode, 14 - bits(sysM, 0));
760 if (bits(sysM, 0) == 1) {
768 int sysM2 = bits(sysM, 2);
769 int sysM1 = bits(sysM,
[all...]
H A Dutility.hh354 decodeMrsMsrBankedReg(uint8_t sysM, bool r, bool &isIntReg, int &regIdx,
361 decodeMrsMsrBankedIntRegIndex(uint8_t sysM, bool r) argument
367 validReg = decodeMrsMsrBankedReg(sysM, r, isIntReg, regIdx, 0, 0, 0, false);

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