Searched refs:src_reg (Results 1 - 5 of 5) sorted by relevance

/gem5/src/cpu/minor/
H A Ddyn_inst.cc199 unsigned int src_reg = 0; local
200 while (src_reg < num_src_regs) {
201 printRegName(regs_str, staticInst->srcRegIdx(src_reg));
203 src_reg++;
204 if (src_reg != num_src_regs)
/gem5/src/arch/mips/
H A Dmt.hh239 yieldThread(TC *tc, Fault &fault, int src_reg, uint32_t yield_mask) argument
241 if (src_reg == 0) {
277 } else if (src_reg > 0) {
278 if (src_reg && !yield_mask != 0) {
285 } else if (src_reg != -2) {
297 return src_reg & yield_mask;
/gem5/src/cpu/o3/
H A Dinst_queue_impl.hh1280 PhysRegIdPtr src_reg = local
1293 !src_reg->isFixedMapping()) {
1294 dependGraph.remove(src_reg->flatIndex(),
1381 PhysRegIdPtr src_reg = new_inst->renamedSrcRegIdx(src_reg_idx); local
1387 if (src_reg->isFixedMapping()) {
1389 } else if (!regScoreboard[src_reg->flatIndex()]) {
1392 new_inst->pcState(), src_reg->index(),
1393 src_reg->className());
1395 dependGraph.insert(src_reg->flatIndex(), new_inst);
1403 new_inst->pcState(), src_reg
[all...]
H A Drename_impl.hh1075 const RegId& src_reg = inst->srcRegIdx(src_idx); local
1078 renamed_reg = map->lookup(tc->flattenRegId(src_reg));
1079 switch (src_reg.classValue()) {
1098 panic("Invalid register class: %d.", src_reg.classValue());
1104 tid, src_reg.className(),
1105 src_reg.index(), renamed_reg->index(),
/gem5/src/cpu/o3/probe/
H A Delastic_trace.cc247 const RegId& src_reg = dyn_inst->srcRegIdx(src_idx); local
248 if (!src_reg.isMiscReg() &&
249 !src_reg.isZeroReg()) {

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