Searched refs:sram_cell (Results 1 - 6 of 6) sorted by relevance

/gem5/ext/mcpat/cacti/
H A Dbasic_circuit.cc103 dt = &g_tp.sram_cell; // SRAM cell access transistor
128 dt = &g_tp.sram_cell; // SRAM cell access transistor
155 dt = &g_tp.sram_cell; // SRAM cell access transistor
224 dt = &g_tp.sram_cell; // SRAM cell access transistor
252 dt = &g_tp.sram_cell; // SRAM cell access transistor
309 dt = &(g_tp.sram_cell);
327 dt = &(g_tp.sram_cell);
357 dt = &(g_tp.sram_cell);
374 dt = &(g_tp.sram_cell);
391 dt = &(g_tp.sram_cell);
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H A Dparameter.h219 DeviceType sram_cell; // SRAM cell transistor member in class:TechnologyParameter
254 sram_cell.reset();
349 Area cell, cam_cell;//cell is the sram_cell in both nomal cache/ram and FA.
H A Dparameter.cc147 sram_cell.display(indent + 2);
390 V_b_sense = (0.05 * g_tp.sram_cell.Vdd > VBITSENSEMIN) ? 0.05 * g_tp.sram_cell.Vdd : VBITSENSEMIN;
400 V_b_sense = (0.05 * g_tp.sram_cell.Vdd > VBITSENSEMIN) ? 0.05 * g_tp.sram_cell.Vdd : VBITSENSEMIN;
H A Dmat.cc617 height += height_sense_amplifier(/*camFlag? sram_cell.w:*/cell.w * deg_bl_muxing / (RWP + ERP)); // sense_amp_height
991 gate_leak_power_RD_port_sram_cell = Ig_port_erp * g_tp.sram_cell.Vdd;
1072 v_th_mem_cell = g_tp.sram_cell.Vth;
1073 V_wl = g_tp.sram_cell.Vdd;
1087 leak_power_cc_inverters_sram_cell = Icell * g_tp.sram_cell.Vdd;
1088 leak_power_acc_tr_RW_or_WR_port_sram_cell = Iport * g_tp.sram_cell.Vdd;
1089 leak_power_RD_port_sram_cell = Iport_erp * g_tp.sram_cell.Vdd;
1099 gate_leak_power_cc_inverters_sram_cell = Ig_cell * g_tp.sram_cell.Vdd;
1100 gate_leak_power_RD_port_sram_cell = Ig_port_erp * g_tp.sram_cell.Vdd;
1160 g_tp.sram_cell
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H A Dtechnology.cc1633 g_tp.sram_cell.Vdd += curr_alpha * vdd[ram_cell_tech_type];
1634 g_tp.sram_cell.l_phy += curr_alpha * Lphy[ram_cell_tech_type];
1635 g_tp.sram_cell.l_elec += curr_alpha * Lelec[ram_cell_tech_type];
1636 g_tp.sram_cell.t_ox += curr_alpha * t_ox[ram_cell_tech_type];
1637 g_tp.sram_cell.Vth += curr_alpha * v_th[ram_cell_tech_type];
1638 g_tp.sram_cell.C_g_ideal += curr_alpha * c_g_ideal[ram_cell_tech_type];
1639 g_tp.sram_cell.C_fringe += curr_alpha * c_fringe[ram_cell_tech_type];
1640 g_tp.sram_cell.C_junc += curr_alpha * c_junc[ram_cell_tech_type];
1641 g_tp.sram_cell.C_junc_sidewall = 0.25e-15; // F/micron
1642 g_tp.sram_cell
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H A Ddecoder.cc189 Vpp = g_tp.sram_cell.Vdd;

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