Searched refs:rs2 (Results 1 - 7 of 7) sorted by relevance

/gem5/tests/test-progs/insttest/src/riscv/
H A Drv64m.h41 mul(int64_t rs1, int64_t rs2) argument
44 ROP("mul", rd, rs1, rs2);
49 mulh(int64_t rs1, int64_t rs2) argument
52 ROP("mulh", rd, rs1, rs2);
57 mulhsu(int64_t rs1, uint64_t rs2) argument
60 ROP("mulhsu", rd, rs1, rs2);
65 mulhu(uint64_t rs1, uint64_t rs2) argument
68 ROP("mulhu", rd, rs1, rs2);
73 div(int64_t rs1, int64_t rs2) argument
76 ROP("div", rd, rs1, rs2);
81 divu(uint64_t rs1, uint64_t rs2) argument
89 rem(int64_t rs1, int64_t rs2) argument
97 remu(uint64_t rs1, uint64_t rs2) argument
105 mulw(int64_t rs1, int64_t rs2) argument
113 divw(int64_t rs1, int64_t rs2) argument
121 divuw(uint64_t rs1, uint64_t rs2) argument
129 remw(int64_t rs1, int64_t rs2) argument
137 remuw(uint64_t rs1, uint64_t rs2) argument
[all...]
H A Drv64a.h51 sc_w(int64_t rs2, int32_t& mem) argument
57 : "r" (addr), "r" (rs2)
63 amoswap_w(int64_t mem, int64_t rs2) argument
69 : "r" (addr), "r" (rs2)
75 amoadd_w(int64_t mem, int64_t rs2) argument
81 : "r" (addr), "r" (rs2)
87 amoxor_w(uint64_t mem, uint64_t rs2) argument
93 : "r" (addr), "r" (rs2)
99 amoand_w(uint64_t mem, uint64_t rs2) argument
105 : "r" (addr), "r" (rs2)
111 amoor_w(uint64_t mem, uint64_t rs2) argument
123 amomin_w(int64_t mem, int64_t rs2) argument
135 amomax_w(int64_t mem, int64_t rs2) argument
147 amominu_w(uint64_t mem, uint64_t rs2) argument
159 amomaxu_w(uint64_t mem, uint64_t rs2) argument
180 sc_d(int64_t rs2, int64_t& mem) argument
192 amoswap_d(int64_t mem, int64_t rs2) argument
204 amoadd_d(int64_t mem, int64_t rs2) argument
216 amoxor_d(uint64_t mem, uint64_t rs2) argument
228 amoand_d(uint64_t mem, uint64_t rs2) argument
240 amoor_d(uint64_t mem, uint64_t rs2) argument
252 amomin_d(int64_t mem, int64_t rs2) argument
264 amomax_d(int64_t mem, int64_t rs2) argument
276 amominu_d(uint64_t mem, uint64_t rs2) argument
288 amomaxu_d(uint64_t mem, uint64_t rs2) argument
[all...]
H A Drv64i.h195 store(const M& rs2) argument
201 asm volatile("sb %1,%0" : "=m" (mem) : "r" (rs2));
204 asm volatile("sh %1,%0" : "=m" (mem) : "r" (rs2));
207 asm volatile("sw %1,%0" : "=m" (mem) : "r" (rs2));
210 asm volatile("sd %1,%0" : "=m" (mem) : "r" (rs2));
289 add(int64_t rs1, int64_t rs2) argument
292 ROP("add", rd, rs1, rs2);
297 sub(int64_t rs1, int64_t rs2) argument
300 ROP("sub", rd, rs1, rs2);
305 sll(int64_t rs1, int64_t rs2) argument
313 slt(int64_t rs1, int64_t rs2) argument
321 sltu(uint64_t rs1, uint64_t rs2) argument
329 xor_inst(uint64_t rs1, uint64_t rs2) argument
337 srl(uint64_t rs1, uint64_t rs2) argument
345 sra(int64_t rs1, int64_t rs2) argument
353 or_inst(uint64_t rs1, uint64_t rs2) argument
361 and_inst(uint64_t rs1, uint64_t rs2) argument
401 addw(int64_t rs1, int64_t rs2) argument
409 subw(int64_t rs1, int64_t rs2) argument
417 sllw(int64_t rs1, int64_t rs2) argument
425 srlw(uint64_t rs1, uint64_t rs2) argument
433 sraw(int64_t rs1, int64_t rs2) argument
[all...]
H A Dinsttest.h42 #define ROP(inst, rd, rs1, rs2) \
43 asm volatile(inst " %0,%1,%2" : "=r" (rd) : "r" (rs1), "r" (rs2))
H A Drv64a.cpp45 int64_t rs2 = 256;
50 result = A::sc_w(rs2, mem);
139 int64_t rs2 = 256;
144 result = A::sc_d(rs2, mem);
/gem5/util/m5/
H A Dm5op_sparc.S37 #define INST(func, rs1, rs2, rd) \
39 (rs1) << 14 | (rs2) << 0;
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ud/
H A Dmove.S42 #define TEST_FSGNJS(n, rd, rs1, rs2) \
45 li a2, rs2; \
52 li a2, rs2; \
74 #define TEST_FSGNJD_SP(n, isnan, rd, rs1, rs2) \
77 li a2, rs2; \
88 li a2, rs2; \

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