Searched refs:degree (Results 1 - 13 of 13) sorted by relevance

/gem5/src/mem/cache/prefetch/
H A Dtagged.cc41 : QueuedPrefetcher(p), degree(p->degree)
52 for (int d = 1; d <= degree; d++) {
H A Dtagged.hh47 const int degree; member in class:TaggedPrefetcher
H A Dirregular_stream_buffer.hh57 const unsigned degree; member in class:IrregularStreamBufferPrefetcher
H A Dstride.hh78 const int degree; member in class:StridePrefetcher
H A Daccess_map_pattern_matching.cc55 numRawCacheHits(0), degree(startDegree), usefulDegree(startDegree),
94 degree = std::min((unsigned) memory_bandwidth, usefulDegree);
224 if (addresses.size() == degree) {
248 if (addresses.size() == degree) {
H A Daccess_map_pattern_matching.hh126 /** Current degree */
127 unsigned degree; member in class:AccessMapPatternMatching
128 /** Current useful degree */
173 * the prefetcher accuracy, when this event triggers, the prefetcher degree
H A Dstride.cc87 degree(p->degree),
189 // Generate up to degree prefetches
190 for (int d = 1; d <= degree; d++) {
H A Dirregular_stream_buffer.cc42 degree(p->degree),
138 // addresses in ascending order, as many as indicated by the degree
139 // (given the structured address S, prefetch S+1, S+2, .. up to S+degree)
156 d <= degree && (sp_index + d) < prefetchCandidatesPerEntry;
H A DPrefetcher.py161 degree = Param.Int(4, "Number of prefetches to generate") variable in class:StridePrefetcher
172 degree = Param.Int(2, "Number of prefetches to generate") variable in class:TaggedPrefetcher
283 "Initial degree (Maximum number of prefetches generated")
355 degree = Param.Unsigned(4, "Number of prefetches to generate") variable in class:IrregularStreamBufferPrefetcher
/gem5/configs/common/cores/arm/
H A Dex5_LITTLE.py150 prefetcher = StridePrefetcher(degree=1, latency = 1)
H A DO3_ARM_v7a.py205 prefetcher = StridePrefetcher(degree=8, latency = 1)
H A Dex5_big.py202 prefetcher = StridePrefetcher(degree=8, latency = 1)
H A DHPI.py1387 degree=4) variable in class:HPI_DCache

Completed in 27 milliseconds