Searched refs:decodeAArch64SysReg (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/arm/kvm/
H A Darmv8_cpu.cc190 decodeAArch64SysReg(op0, op1, crn, crm, op2));
379 const MiscRegIndex idx(decodeAArch64SysReg(op0, op1, crn, crm, op2));
/gem5/src/arch/arm/
H A Dmiscregs.hh988 MiscRegIndex decodeAArch64SysReg(unsigned op0, unsigned op1,
H A Dmiscregs.cc1200 decodeAArch64SysReg(unsigned op0, unsigned op1, function in namespace:ArmISA

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