| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt12.1/ |
| H A D | main.cpp | 47 sc_signal<bool> cs("CS");
55 accessor A("Accessor", clk, data1, cs, we, addr, data2);
56 ram R("Ram", data2, cs, we, addr, data1);
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| H A D | ram.h | 48 const sc_signal<bool>& cs; //input local
60 : datain(DATAIN), cs(CS), we(WE),
65 sensitive << cs; local
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| H A D | ram.cpp | 49 if (cs.read() == true) { // Block selected
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt12.2/ |
| H A D | main.cpp | 45 sc_signal<bool> cs("CS");
54 accessor A("Accessor", clk, data1, cs, we, addr, data2, delay_cycles);
55 ram R("Ram", clk, data2, cs, we, addr, data1, delay_cycles);
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| H A D | ram.h | 50 const sc_signal<bool>& cs; //input local
70 : datain(DATAIN), cs(CS), we(WE),
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| H A D | ram.cpp | 48 do { wait(); } while (cs != true);
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| /gem5/src/arch/x86/ |
| H A D | remote_gdb.hh | 76 uint32_t cs; member in struct:X86ISA::RemoteGDB::X86GdbRegCache::__anon11
118 uint32_t cs; member in struct:X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED
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| H A D | remote_gdb.cc | 129 r.cs = context->readMiscRegNoEffect(MISCREG_CS);
151 r.cs = context->readMiscRegNoEffect(MISCREG_CS);
181 if (r.cs != context->readMiscRegNoEffect(MISCREG_CS))
209 if (r.cs != context->readMiscRegNoEffect(MISCREG_CS))
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| H A D | system.cc | 173 SegSelector cs = 0; local
174 cs.si = numGDTEntries - 1;
176 tc->setMiscReg(MISCREG_CS, (RegVal)cs);
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| H A D | process.cc | 309 SegSelector cs = 0; local
310 cs.si = numGDTEntries - 1;
311 cs.rpl = 3;
359 tc->setMiscReg(MISCREG_CS, cs);
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| /gem5/ext/pybind11/include/pybind11/detail/ |
| H A D | descr.h | 35 constexpr descr(char c, Chars... cs) : text{c, static_cast<char>(cs)..., '\0'} { } argument
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| /gem5/src/cpu/kvm/ |
| H A D | x86_cpu.cc | 147 APPLY_SEGMENT(cs, MISCREG_CS - MISCREG_SEG_SEL_BASE); \
435 if (sregs.cs.type == 3 && seg.dpl != 0)
776 forceSegAccessed(sregs.cs);
795 if ((sregs.cs.type == SEG_CS_TYPE_ACCESSED ||
796 sregs.cs.type == SEG_CS_TYPE_READ_ACCESSED) &&
797 sregs.cs.dpl != sregs.ss.dpl) {
800 sregs.cs.dpl, sregs.ss.dpl, sregs.cs.dpl);
801 sregs.ss.dpl = sregs.cs.dpl;
981 tc->pcState(PCState(regs.rip + sregs.cs
[all...] |
| /gem5/src/arch/arm/ |
| H A D | pmu.cc | 621 const CounterState &cs(getCounter(id));
622 PMEVTYPER_t type(cs.filter);
624 type.evtCount = cs.eventId;
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| /gem5/util/statetrace/arch/amd64/ |
| H A D | tracechild.cc | 108 case CS: return myregs.cs;
334 byte == 0x2E || //cs
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| /gem5/src/dev/net/ |
| H A D | i8254xGBe_defs.hh | 374 ADD_FIELD32(cs,1,1); // chip select to eeprom
|