Searched refs:cell_a_w (Results 1 - 5 of 5) sorted by relevance
/gem5/ext/mcpat/cacti/ |
H A D | subarray.cc | 126 C_wl = (gate_C_pass(g_tp.dram.cell_a_w, g_tp.dram.b_w, true, true) + c_w_metal) * num_cols; 131 C_b_row_drain_C = drain_C_(g_tp.dram.cell_a_w, NCH, 1, 0, cell.w, true, true) / 2.0; // due to shared contact 136 C_wl = (gate_C_pass(g_tp.sram.cell_a_w, 137 (g_tp.sram.b_w - 2 * g_tp.sram.cell_a_w) / 2.0, 140 C_b_row_drain_C = drain_C_(g_tp.sram.cell_a_w, NCH, 1, 0, cell.w, false, true) / 2.0; // due to shared contact 147 C_wl_cam = (gate_C_pass(g_tp.cam.cell_a_w, 148 (g_tp.cam.b_w - 2 * g_tp.cam.cell_a_w) / 157 C_wl_ram = (gate_C_pass(g_tp.sram.cell_a_w, 159 g_tp.sram.cell_a_w) / 2.0, false, 181 C_b_row_drain_C = drain_C_(g_tp.cam.cell_a_w, NC [all...] |
H A D | parameter.h | 132 double cell_a_w; member in class:TechnologyParameter::MemoryType 140 cell_a_w = 0;
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H A D | parameter.cc | 94 cout << indent_str << "cell_a_w = " << setw(12) << cell_a_w << " um" << endl; 376 double Cbitrow_drain_cap = drain_C_(g_tp.dram.cell_a_w, NCH, 1, 0, cell.w, true, true) / 2.0; 394 double Cbitrow_drain_cap = drain_C_(g_tp.sram.cell_a_w, NCH, 1, 0, cell.w, false, true) / 2.0; 404 double Cbitrow_drain_cap = drain_C_(g_tp.cam.cell_a_w, NCH, 1, 0, cam_cell.w, false, true) / 2.0;//TODO: comment out these two lines
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H A D | mat.cc | 949 double Iport = cmos_Isub_leakage(g_tp.cam.cell_a_w, 0, 1, nmos, false, true);//TODO: how much is the idle time? just by *2? 950 double Iport_erp = cmos_Isub_leakage(g_tp.cam.cell_a_w, 0, 2, nmos, false, true); 983 double Ig_port_erp = cmos_Ig_leakage(g_tp.cam.cell_a_w, 0, 1, nmos, false, true); 1023 double R_access_tr = tr_R_on(g_tp.sram.cell_a_w, NCH, 1, is_dram, true); 1068 R_cell_acc = tr_R_on(g_tp.dram.cell_a_w, NCH, 1, true, true); 1075 R_cell_acc = tr_R_on(g_tp.sram.cell_a_w, NCH, 1, false, true); 1079 double Iport = cmos_Isub_leakage(g_tp.sram.cell_a_w, 0, 1, nmos, 1081 double Iport_erp = cmos_Isub_leakage(g_tp.sram.cell_a_w, 0, 2, nmos, 1093 double Ig_port_erp = cmos_Ig_leakage(g_tp.sram.cell_a_w, 0, 1, nmos,
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H A D | technology.cc | 1698 g_tp.dram.cell_a_w += curr_alpha * curr_Wmemcella_dram; 1704 g_tp.sram.cell_a_w += curr_alpha * curr_Wmemcella_sram; 1710 g_tp.cam.cell_a_w += curr_alpha * curr_Wmemcella_cam;//sheng
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