| /gem5/src/cpu/testers/traffic_gen/ |
| H A D | dram_rot_gen.hh | 86 * @param addr_mapping Address mapping to be used,
97 unsigned int addr_mapping,
104 nbr_of_banks_util, addr_mapping,
90 DramRotGen(SimObject &obj, MasterID master_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, unsigned int addr_mapping, unsigned int nbr_of_ranks, unsigned int max_seq_count_per_rank) argument
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| H A D | dram_gen.hh | 86 * @param addr_mapping Address mapping to be used,
98 unsigned int addr_mapping,
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| H A D | dram_gen.cc | 61 unsigned int addr_mapping,
72 nbrOfBanksUtil(nbr_of_banks_util), addrMapping(addr_mapping),
52 DramGen(SimObject &obj, MasterID master_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, unsigned int addr_mapping, unsigned int nbr_of_ranks) argument
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| H A D | traffic_gen.cc | 226 unsigned int addr_mapping; local
230 nbr_of_banks_util >> addr_mapping >>
257 addr_mapping,
277 addr_mapping,
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| H A D | base.hh | 281 unsigned int addr_mapping,
291 unsigned int addr_mapping,
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| H A D | base.cc | 407 unsigned int addr_mapping,
419 addr_mapping,
432 unsigned int addr_mapping,
445 addr_mapping,
400 createDram(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, unsigned int addr_mapping, unsigned int nbr_of_ranks) argument
424 createDramRot(Tick duration, Addr start_addr, Addr end_addr, Addr blocksize, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, unsigned int addr_mapping, unsigned int nbr_of_ranks, unsigned int max_seq_count_per_rank) argument
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| /gem5/configs/dram/ |
| H A D | sweep.py | 127 system.mem_ctrls[0].addr_mapping = "RoCoRaBaCh"
129 system.mem_ctrls[0].addr_mapping = "RoRaBaCoCh"
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| H A D | low_power_sweep.py | 123 system.mem_ctrls[0].addr_mapping = "RoCoRaBaCh"
125 system.mem_ctrls[0].addr_mapping = "RoRaBaCoCh"
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| /gem5/configs/common/ |
| H A D | MemConfig.py | 126 if ctrl.addr_mapping.value == 'RoRaBaChCo':
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| /gem5/src/mem/ |
| H A D | DRAMCtrl.py | 102 addr_mapping = Param.AddrMap('RoRaBaCoCh', "Address mapping policy") variable in class:DRAMCtrl
490 addr_mapping = 'RoCoRaBaCh' variable in class:HMC_2500_1x32
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| H A D | dram_ctrl.cc | 93 memSchedPolicy(p->mem_sched_policy), addrMapping(p->addr_mapping),
|