| /gem5/src/mem/ruby/profiler/ |
| H A D | AccessTraceForAddress.cc | 63 RubyAccessMode access_mode, NodeID cpu,
78 if (access_mode == RubyAccessMode_User) {
62 update(RubyRequestType type, RubyAccessMode access_mode, NodeID cpu, bool sharing_miss) argument
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| H A D | AccessTraceForAddress.hh | 51 void update(RubyRequestType type, RubyAccessMode access_mode, NodeID cpu,
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| H A D | AddressProfiler.cc | 285 RubyAccessMode access_mode, NodeID id,
296 update(type, access_mode, id, sharing_miss);
303 update(type, access_mode, id, sharing_miss);
307 update(type, access_mode, id, sharing_miss);
315 update(type, access_mode, id, sharing_miss);
283 addTraceSample(Addr data_addr, Addr pc_addr, RubyRequestType type, RubyAccessMode access_mode, NodeID id, bool sharing_miss) argument
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| H A D | AddressProfiler.hh | 57 RubyRequestType type, RubyAccessMode access_mode,
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| /gem5/ext/mcpat/cacti/ |
| H A D | cacti_interface.h | 135 unsigned int access_mode; member in class:InputParameter
362 int access_mode,
419 int access_mode, //0 normal, 1 seq, 2 fast
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| H A D | io.cc | 195 access_mode = 2;
197 access_mode = 1;
199 access_mode = 0;
519 cout << "Access mode : " << access_mode << endl;
687 int access_mode, //0 normal, 1 seq, 2 fast
753 g_ip->access_mode = access_mode;
875 int access_mode,
943 g_ip->access_mode = access_mode;
671 cacti_interface( int cache_size, int line_size, int associativity, int rw_ports, int excl_read_ports, int excl_write_ports, int single_ended_read_ports, int banks, double tech_node, int page_sz, int burst_length, int pre_width, int output_width, int specific_tag, int tag_width, int access_mode, int cache, int main_mem, int obj_func_delay, int obj_func_dynamic_power, int obj_func_leakage_power, int obj_func_area, int obj_func_cycle_time, int dev_func_delay, int dev_func_dynamic_power, int dev_func_leakage_power, int dev_func_area, int dev_func_cycle_time, int ed_ed2_none, int temp, int wt, int data_arr_ram_cell_tech_flavor_in, int data_arr_peri_global_tech_flavor_in, int tag_arr_ram_cell_tech_flavor_in, int tag_arr_peri_global_tech_flavor_in, int interconnect_projection_type_in, int wire_inside_mat_type_in, int wire_outside_mat_type_in, int is_nuca, int core_count, int cache_level, int nuca_bank_count, int nuca_obj_func_delay, int nuca_obj_func_dynamic_power, int nuca_obj_func_leakage_power, int nuca_obj_func_area, int nuca_obj_func_cycle_time, int nuca_dev_func_delay, int nuca_dev_func_dynamic_power, int nuca_dev_func_leakage_power, int nuca_dev_func_area, int nuca_dev_func_cycle_time, int REPEATERS_IN_HTREE_SEGMENTS_in, int p_input) argument
861 cacti_interface( int cache_size, int line_size, int associativity, int rw_ports, int excl_read_ports, int excl_write_ports, int single_ended_read_ports, int search_ports, int banks, double tech_node, int output_width, int specific_tag, int tag_width, int access_mode, int cache, int main_mem, int obj_func_delay, int obj_func_dynamic_power, int obj_func_leakage_power, int obj_func_cycle_time, int obj_func_area, int dev_func_delay, int dev_func_dynamic_power, int dev_func_leakage_power, int dev_func_area, int dev_func_cycle_time, int ed_ed2_none, int temp, int wt, int data_arr_ram_cell_tech_flavor_in, int data_arr_peri_global_tech_flavor_in, int tag_arr_ram_cell_tech_flavor_in, int tag_arr_peri_global_tech_flavor_in, int interconnect_projection_type_in, int wire_inside_mat_type_in, int wire_outside_mat_type_in, int REPEATERS_IN_HTREE_SEGMENTS_in, int VERTICAL_HTREE_WIRES_OVER_THE_ARRAY_in, int BROADCAST_ADDR_DATAIN_OVER_VERTICAL_HTREES_in, int PAGE_SIZE_BITS_in, int BURST_LENGTH_in, int INTERNAL_PREFETCH_WIDTH_in, int force_wiretype, int wiretype, int force_config, int ndwl, int ndbl, int nspd, int ndcm, int ndsam1, int ndsam2, int ecc) argument
[all...] |
| /gem5/ext/mcpat/ |
| H A D | core.cc | 104 interface_ip.access_mode = Normal;
154 interface_ip.access_mode = Normal;
328 interface_ip.access_mode = Fast;
353 interface_ip.access_mode = Fast;
381 interface_ip.access_mode = Fast;
407 interface_ip.access_mode = Fast;
431 interface_ip.access_mode = Fast;
545 interface_ip.access_mode = Sequential;
638 interface_ip.access_mode = Normal;
690 interface_ip.access_mode
[all...] |
| H A D | cacheunit.cc | 106 interface_ip.access_mode = cache_params.cache_access_mode;
241 interface_ip.access_mode = cache_params.miss_buff_access_mode;
298 interface_ip.access_mode = cache_params.fetch_buff_access_mode;
353 interface_ip.access_mode = cache_params.prefetch_buff_access_mode;
408 interface_ip.access_mode = cache_params.writeback_buff_access_mode;
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| H A D | memoryctrl.cc | 345 interface_ip.access_mode = Normal;
399 interface_ip.access_mode = Sequential;
440 interface_ip.access_mode = Normal;
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| H A D | system.cc | 336 interface_ip.access_mode = 2;
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| /gem5/src/mem/ruby/system/ |
| H A D | GPUCoalescer.hh | 227 Addr pc, RubyAccessMode access_mode,
|