110234Syasuko.eckert@amd.com/***************************************************************************** 210234Syasuko.eckert@amd.com * McPAT 310234Syasuko.eckert@amd.com * SOFTWARE LICENSE AGREEMENT 410234Syasuko.eckert@amd.com * Copyright (c) 2010-2013 Advanced Micro Devices, Inc. 510234Syasuko.eckert@amd.com * All Rights Reserved 610234Syasuko.eckert@amd.com * 710234Syasuko.eckert@amd.com * Redistribution and use in source and binary forms, with or without 810234Syasuko.eckert@amd.com * modification, are permitted provided that the following conditions are 910234Syasuko.eckert@amd.com * met: redistributions of source code must retain the above copyright 1010234Syasuko.eckert@amd.com * notice, this list of conditions and the following disclaimer; 1110234Syasuko.eckert@amd.com * redistributions in binary form must reproduce the above copyright 1210234Syasuko.eckert@amd.com * notice, this list of conditions and the following disclaimer in the 1310234Syasuko.eckert@amd.com * documentation and/or other materials provided with the distribution; 1410234Syasuko.eckert@amd.com * neither the name of the copyright holders nor the names of its 1510234Syasuko.eckert@amd.com * contributors may be used to endorse or promote products derived from 1610234Syasuko.eckert@amd.com * this software without specific prior written permission. 1710234Syasuko.eckert@amd.com 1810234Syasuko.eckert@amd.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1910234Syasuko.eckert@amd.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2010234Syasuko.eckert@amd.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2110234Syasuko.eckert@amd.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2210234Syasuko.eckert@amd.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2310234Syasuko.eckert@amd.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2410234Syasuko.eckert@amd.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2510234Syasuko.eckert@amd.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2610234Syasuko.eckert@amd.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2710234Syasuko.eckert@amd.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2810234Syasuko.eckert@amd.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2910234Syasuko.eckert@amd.com * 3010234Syasuko.eckert@amd.com * Authors: Joel Hestness 3110234Syasuko.eckert@amd.com * Yasuko Eckert 3210234Syasuko.eckert@amd.com * 3310234Syasuko.eckert@amd.com ***************************************************************************/ 3410234Syasuko.eckert@amd.com 3510234Syasuko.eckert@amd.com#include <algorithm> 3610234Syasuko.eckert@amd.com#include <cmath> 3710234Syasuko.eckert@amd.com#include <cstdio> 3810234Syasuko.eckert@amd.com#include <fstream> 3910234Syasuko.eckert@amd.com#include <iostream> 4010234Syasuko.eckert@amd.com#include <string> 4110234Syasuko.eckert@amd.com 4210234Syasuko.eckert@amd.com#include "array.h" 4310234Syasuko.eckert@amd.com#include "basic_circuit.h" 4410234Syasuko.eckert@amd.com#include "common.h" 4510234Syasuko.eckert@amd.com#include "const.h" 4610234Syasuko.eckert@amd.com#include "parameter.h" 4710234Syasuko.eckert@amd.com#include "system.h" 4810234Syasuko.eckert@amd.com#include "version.h" 4910234Syasuko.eckert@amd.com 5010234Syasuko.eckert@amd.com// TODO: Fix this constructor to default initialize all pointers to NULL 5110234Syasuko.eckert@amd.comSystem::System(XMLNode* _xml_data) 5210234Syasuko.eckert@amd.com : McPATComponent(_xml_data) { 5310234Syasuko.eckert@amd.com int i; 5410234Syasuko.eckert@amd.com int currCore = 0; 5510234Syasuko.eckert@amd.com int currNOC = 0; 5610234Syasuko.eckert@amd.com name = "System"; 5710234Syasuko.eckert@amd.com set_proc_param(); 5810234Syasuko.eckert@amd.com 5910234Syasuko.eckert@amd.com // TODO: This loop can (and should) be called by every component in 6010234Syasuko.eckert@amd.com // the hierarchy. Consider moving it to McPATComponent 6110234Syasuko.eckert@amd.com int numChildren = xml_data->nChildNode("component"); 6210234Syasuko.eckert@amd.com for (i = 0; i < numChildren; i++ ) { 6310234Syasuko.eckert@amd.com // For each child node of the system, 6410234Syasuko.eckert@amd.com XMLNode* childXML = xml_data->getChildNodePtr("component", &i); 6510234Syasuko.eckert@amd.com XMLCSTR type = childXML->getAttribute("type"); 6610234Syasuko.eckert@amd.com 6710234Syasuko.eckert@amd.com if (!type) { 6810234Syasuko.eckert@amd.com warnMissingComponentType(childXML->getAttribute("id")); 6910234Syasuko.eckert@amd.com 7010234Syasuko.eckert@amd.com } STRCMP(type, "Core") { 7110234Syasuko.eckert@amd.com // TODO: If homogeneous cores, and currCore > 0, just copy core 0 7210234Syasuko.eckert@amd.com children.push_back(new Core(childXML, currCore, &interface_ip)); 7310234Syasuko.eckert@amd.com currCore++; 7410234Syasuko.eckert@amd.com } STRCMP(type, "CacheUnit") { 7510234Syasuko.eckert@amd.com children.push_back(new CacheUnit(childXML, &interface_ip)); 7610234Syasuko.eckert@amd.com } STRCMP(type, "CacheController") { 7710234Syasuko.eckert@amd.com // TODO: Remove reliance on interface_ip - there should be a better 7810234Syasuko.eckert@amd.com // way to share global variables than passing, copying 7910234Syasuko.eckert@amd.com children.push_back(new CacheController(childXML, &interface_ip)); 8010234Syasuko.eckert@amd.com } STRCMP(type, "MemoryController") { 8110234Syasuko.eckert@amd.com children.push_back(new MemoryController(childXML, &interface_ip)); 8210234Syasuko.eckert@amd.com } STRCMP(type, "FlashController") { 8310234Syasuko.eckert@amd.com children.push_back(new FlashController(childXML, &interface_ip)); 8410234Syasuko.eckert@amd.com } STRCMP(type, "NIUController") { 8510234Syasuko.eckert@amd.com children.push_back(new NIUController(childXML, &interface_ip)); 8610234Syasuko.eckert@amd.com } STRCMP(type, "PCIeController") { 8710234Syasuko.eckert@amd.com children.push_back(new PCIeController(childXML, &interface_ip)); 8810234Syasuko.eckert@amd.com } STRCMP(type, "Memory") { 8910234Syasuko.eckert@amd.com // TODO: 9010234Syasuko.eckert@amd.com warnIncompleteComponentType(type); 9110234Syasuko.eckert@amd.com } STRCMP(type, "OnChipNetwork") { 9210234Syasuko.eckert@amd.com // TODO: Many of the parameters to this constructor should be 9310234Syasuko.eckert@amd.com // handled in another way 9410234Syasuko.eckert@amd.com children.push_back(new OnChipNetwork(childXML, currNOC, 9510234Syasuko.eckert@amd.com &interface_ip)); 9610234Syasuko.eckert@amd.com currNOC++; 9710234Syasuko.eckert@amd.com warnIncompleteComponentType(type); 9810234Syasuko.eckert@amd.com } STRCMP(type, "BusInterconnect") { 9910234Syasuko.eckert@amd.com // TODO: Many of the parameters to this constructor should be 10010234Syasuko.eckert@amd.com // handled in another way 10110234Syasuko.eckert@amd.com children.push_back(new BusInterconnect(childXML, &interface_ip)); 10210234Syasuko.eckert@amd.com warnIncompleteComponentType(type); 10310234Syasuko.eckert@amd.com 10410234Syasuko.eckert@amd.com // TODO: Add a directory data type that can handle the directories 10510234Syasuko.eckert@amd.com // as defined by certain McScript output 10610234Syasuko.eckert@amd.com } else { 10710234Syasuko.eckert@amd.com warnUnrecognizedComponent(type); 10810234Syasuko.eckert@amd.com } 10910234Syasuko.eckert@amd.com } 11010234Syasuko.eckert@amd.com} 11110234Syasuko.eckert@amd.com 11210234Syasuko.eckert@amd.comvoid System::displayDeviceType(int device_type_, uint32_t indent) { 11310234Syasuko.eckert@amd.com string indent_str(indent, ' '); 11410234Syasuko.eckert@amd.com cout << indent_str << "Device Type = "; 11510234Syasuko.eckert@amd.com 11610234Syasuko.eckert@amd.com switch ( device_type_ ) { 11710234Syasuko.eckert@amd.com case 0: 11810234Syasuko.eckert@amd.com cout << "ITRS high performance device type" << endl; 11910234Syasuko.eckert@amd.com break; 12010234Syasuko.eckert@amd.com case 1: 12110234Syasuko.eckert@amd.com cout << "ITRS low standby power device type" << endl; 12210234Syasuko.eckert@amd.com break; 12310234Syasuko.eckert@amd.com case 2: 12410234Syasuko.eckert@amd.com cout << "ITRS low operating power device type" << endl; 12510234Syasuko.eckert@amd.com break; 12610234Syasuko.eckert@amd.com case 3: 12710234Syasuko.eckert@amd.com cout << "LP-DRAM device type" << endl; 12810234Syasuko.eckert@amd.com break; 12910234Syasuko.eckert@amd.com case 4: 13010234Syasuko.eckert@amd.com cout << "COMM-DRAM device type" << endl; 13110234Syasuko.eckert@amd.com break; 13210234Syasuko.eckert@amd.com default: 13310234Syasuko.eckert@amd.com cout << indent_str << "Unknown!" << endl; 13410234Syasuko.eckert@amd.com exit(0); 13510234Syasuko.eckert@amd.com } 13610234Syasuko.eckert@amd.com} 13710234Syasuko.eckert@amd.com 13810234Syasuko.eckert@amd.comvoid System::displayInterconnectType(int interconnect_type_, uint32_t indent) { 13910234Syasuko.eckert@amd.com string indent_str(indent, ' '); 14010234Syasuko.eckert@amd.com cout << indent_str << "Interconnect metal projection = "; 14110234Syasuko.eckert@amd.com 14210234Syasuko.eckert@amd.com switch ( interconnect_type_ ) { 14310234Syasuko.eckert@amd.com case 0: 14410234Syasuko.eckert@amd.com cout << "aggressive interconnect technology projection" << endl; 14510234Syasuko.eckert@amd.com break; 14610234Syasuko.eckert@amd.com case 1: 14710234Syasuko.eckert@amd.com cout << "conservative interconnect technology projection" << endl; 14810234Syasuko.eckert@amd.com break; 14910234Syasuko.eckert@amd.com default: 15010234Syasuko.eckert@amd.com cout << indent_str << "Unknown!" << endl; 15110234Syasuko.eckert@amd.com exit(0); 15210234Syasuko.eckert@amd.com } 15310234Syasuko.eckert@amd.com} 15410234Syasuko.eckert@amd.com 15510234Syasuko.eckert@amd.com// TODO: Migrate this down to the McPATComponent::displayData function 15610234Syasuko.eckert@amd.comvoid System::displayData(uint32_t indent, int plevel) { 15710234Syasuko.eckert@amd.com string indent_str(indent, ' '); 15810234Syasuko.eckert@amd.com string indent_str_next(indent + 2, ' '); 15910234Syasuko.eckert@amd.com if (plevel < 5) { 16010234Syasuko.eckert@amd.com cout << "\nMcPAT (version " << VER_MAJOR << "." << VER_MINOR 16110234Syasuko.eckert@amd.com << " of " << VER_UPDATE << ") results (current print level is " 16210234Syasuko.eckert@amd.com << plevel 16310234Syasuko.eckert@amd.com << ", please increase print level to see the details in " 16410234Syasuko.eckert@amd.com << "components) " << endl; 16510234Syasuko.eckert@amd.com } else { 16610234Syasuko.eckert@amd.com cout << "\nMcPAT (version " << VER_MAJOR << "." << VER_MINOR 16710234Syasuko.eckert@amd.com << " of " << VER_UPDATE << ") results (current print level is 5)" 16810234Syasuko.eckert@amd.com << endl; 16910234Syasuko.eckert@amd.com } 17010234Syasuko.eckert@amd.com 17110234Syasuko.eckert@amd.com cout << "*****************************************************************" 17210234Syasuko.eckert@amd.com << "************************" << endl; 17310234Syasuko.eckert@amd.com cout << indent_str << "Technology " << core_tech_node << " nm" << endl; 17410234Syasuko.eckert@amd.com if (longer_channel_device) 17510234Syasuko.eckert@amd.com cout << indent_str << "Using Long Channel Devices When Appropriate" << endl; 17610234Syasuko.eckert@amd.com displayInterconnectType(interconnect_projection_type, indent); 17710234Syasuko.eckert@amd.com cout << indent_str << "Target Clock Rate (MHz) " << target_core_clockrate / 1e6 << endl; 17810234Syasuko.eckert@amd.com cout << endl; 17910234Syasuko.eckert@amd.com 18010234Syasuko.eckert@amd.com cout << "*****************************************************************" 18110234Syasuko.eckert@amd.com << "************************" << endl; 18210234Syasuko.eckert@amd.com 18310234Syasuko.eckert@amd.com McPATComponent::displayData(indent, plevel); 18410234Syasuko.eckert@amd.com} 18510234Syasuko.eckert@amd.com 18610234Syasuko.eckert@amd.comvoid System::set_proc_param() { 18710234Syasuko.eckert@amd.com // TODO: Consider creating a SystemParams class that tracks system-wide 18810234Syasuko.eckert@amd.com // parameters like these 18910234Syasuko.eckert@amd.com longer_channel_device = false; 19010234Syasuko.eckert@amd.com core_tech_node = -1; 19110234Syasuko.eckert@amd.com temperature = -1; 19210234Syasuko.eckert@amd.com interconnect_projection_type = -1; 19310234Syasuko.eckert@amd.com device_type = -1; 19410234Syasuko.eckert@amd.com physical_address_width = -1; 19510234Syasuko.eckert@amd.com 19610234Syasuko.eckert@amd.com int num_children = xml_data->nChildNode("param"); 19710234Syasuko.eckert@amd.com int i; 19810234Syasuko.eckert@amd.com for (i = 0; i < num_children; i++) { 19910234Syasuko.eckert@amd.com XMLNode* paramNode = xml_data->getChildNodePtr("param", &i); 20010234Syasuko.eckert@amd.com XMLCSTR node_name = paramNode->getAttribute("name"); 20110234Syasuko.eckert@amd.com XMLCSTR value = paramNode->getAttribute("value"); 20210234Syasuko.eckert@amd.com 20310234Syasuko.eckert@amd.com if (!node_name) 20410234Syasuko.eckert@amd.com warnMissingParamName(paramNode->getAttribute("id")); 20510234Syasuko.eckert@amd.com 20610234Syasuko.eckert@amd.com ASSIGN_FP_IF("core_tech_node", core_tech_node); 20710234Syasuko.eckert@amd.com ASSIGN_INT_IF("target_core_clockrate", target_core_clockrate); 20810234Syasuko.eckert@amd.com ASSIGN_INT_IF("temperature", temperature); 20910234Syasuko.eckert@amd.com ASSIGN_INT_IF("device_type", device_type); 21010234Syasuko.eckert@amd.com ASSIGN_INT_IF("longer_channel_device", longer_channel_device); 21110234Syasuko.eckert@amd.com ASSIGN_INT_IF("interconnect_projection_type", 21210234Syasuko.eckert@amd.com interconnect_projection_type); 21310234Syasuko.eckert@amd.com ASSIGN_INT_IF("machine_bits", data_path_width); 21410234Syasuko.eckert@amd.com ASSIGN_INT_IF("virtual_address_width", virtual_address_width); 21510234Syasuko.eckert@amd.com ASSIGN_INT_IF("physical_address_width", physical_address_width); 21610234Syasuko.eckert@amd.com ASSIGN_INT_IF("virtual_memory_page_size", virtual_memory_page_size); 21710234Syasuko.eckert@amd.com ASSIGN_INT_IF("wire_is_mat_type", interface_ip.wire_is_mat_type); 21810234Syasuko.eckert@amd.com ASSIGN_INT_IF("wire_os_mat_type", interface_ip.wire_os_mat_type); 21910234Syasuko.eckert@amd.com ASSIGN_INT_IF("delay_wt", interface_ip.delay_wt); 22010234Syasuko.eckert@amd.com ASSIGN_INT_IF("area_wt", interface_ip.area_wt); 22110234Syasuko.eckert@amd.com ASSIGN_INT_IF("dynamic_power_wt", interface_ip.dynamic_power_wt); 22210234Syasuko.eckert@amd.com ASSIGN_INT_IF("leakage_power_wt", interface_ip.leakage_power_wt); 22310234Syasuko.eckert@amd.com ASSIGN_INT_IF("cycle_time_wt", interface_ip.cycle_time_wt); 22410234Syasuko.eckert@amd.com ASSIGN_INT_IF("delay_dev", interface_ip.delay_dev); 22510234Syasuko.eckert@amd.com ASSIGN_INT_IF("area_dev", interface_ip.area_dev); 22610234Syasuko.eckert@amd.com ASSIGN_INT_IF("dynamic_power_dev", interface_ip.dynamic_power_dev); 22710234Syasuko.eckert@amd.com ASSIGN_INT_IF("leakage_power_dev", interface_ip.leakage_power_dev); 22810234Syasuko.eckert@amd.com ASSIGN_INT_IF("cycle_time_dev", interface_ip.cycle_time_dev); 22910234Syasuko.eckert@amd.com ASSIGN_INT_IF("ed", interface_ip.ed); 23010234Syasuko.eckert@amd.com ASSIGN_INT_IF("burst_len", interface_ip.burst_len); 23110234Syasuko.eckert@amd.com ASSIGN_INT_IF("int_prefetch_w", interface_ip.int_prefetch_w); 23210234Syasuko.eckert@amd.com ASSIGN_INT_IF("page_sz_bits", interface_ip.page_sz_bits); 23310234Syasuko.eckert@amd.com ASSIGN_ENUM_IF("rpters_in_htree", interface_ip.rpters_in_htree, bool); 23410234Syasuko.eckert@amd.com ASSIGN_INT_IF("ver_htree_wires_over_array", 23510234Syasuko.eckert@amd.com interface_ip.ver_htree_wires_over_array); 23610234Syasuko.eckert@amd.com ASSIGN_INT_IF("broadcast_addr_din_over_ver_htrees", 23710234Syasuko.eckert@amd.com interface_ip.broadcast_addr_din_over_ver_htrees); 23810234Syasuko.eckert@amd.com ASSIGN_INT_IF("nuca", interface_ip.nuca); 23910234Syasuko.eckert@amd.com ASSIGN_INT_IF("nuca_bank_count", interface_ip.nuca_bank_count); 24010234Syasuko.eckert@amd.com ASSIGN_ENUM_IF("force_cache_config", 24110234Syasuko.eckert@amd.com interface_ip.force_cache_config, bool); 24210234Syasuko.eckert@amd.com ASSIGN_ENUM_IF("wt", interface_ip.wt, Wire_type); 24310234Syasuko.eckert@amd.com ASSIGN_INT_IF("force_wiretype", interface_ip.force_wiretype); 24410234Syasuko.eckert@amd.com ASSIGN_INT_IF("print_detail", interface_ip.print_detail); 24510234Syasuko.eckert@amd.com ASSIGN_ENUM_IF("add_ecc_b_", interface_ip.add_ecc_b_, bool); 24610234Syasuko.eckert@amd.com 24710234Syasuko.eckert@amd.com else { 24810234Syasuko.eckert@amd.com warnUnrecognizedParam(node_name); 24910234Syasuko.eckert@amd.com } 25010234Syasuko.eckert@amd.com } 25110234Syasuko.eckert@amd.com 25210234Syasuko.eckert@amd.com // Change from MHz to Hz 25310234Syasuko.eckert@amd.com target_core_clockrate *= 1e6; 25410234Syasuko.eckert@amd.com interconnect_projection_type = 25510234Syasuko.eckert@amd.com (interconnect_projection_type == 0) ? 0 : 1; 25610234Syasuko.eckert@amd.com 25710234Syasuko.eckert@amd.com num_children = xml_data->nChildNode("stat"); 25810234Syasuko.eckert@amd.com for (i = 0; i < num_children; i++) { 25910234Syasuko.eckert@amd.com XMLNode* statNode = xml_data->getChildNodePtr("stat", &i); 26010234Syasuko.eckert@amd.com XMLCSTR node_name = statNode->getAttribute("name"); 26110234Syasuko.eckert@amd.com XMLCSTR value = statNode->getAttribute("value"); 26210234Syasuko.eckert@amd.com 26310234Syasuko.eckert@amd.com if (!node_name) 26410234Syasuko.eckert@amd.com warnMissingStatName(statNode->getAttribute("id")); 26510234Syasuko.eckert@amd.com 26610234Syasuko.eckert@amd.com ASSIGN_FP_IF("total_cycles", total_cycles); 26710234Syasuko.eckert@amd.com 26810234Syasuko.eckert@amd.com else { 26910234Syasuko.eckert@amd.com warnUnrecognizedStat(node_name); 27010234Syasuko.eckert@amd.com } 27110234Syasuko.eckert@amd.com } 27210234Syasuko.eckert@amd.com 27310234Syasuko.eckert@amd.com if (temperature < 0) { 27410234Syasuko.eckert@amd.com errorUnspecifiedParam("temperature"); 27510234Syasuko.eckert@amd.com } 27610234Syasuko.eckert@amd.com 27710234Syasuko.eckert@amd.com if (core_tech_node < 0) { 27810234Syasuko.eckert@amd.com errorUnspecifiedParam("core_tech_node"); 27910234Syasuko.eckert@amd.com } 28010234Syasuko.eckert@amd.com 28110234Syasuko.eckert@amd.com if (interconnect_projection_type < 0) { 28210234Syasuko.eckert@amd.com errorUnspecifiedParam("interconnect_projection_type"); 28310234Syasuko.eckert@amd.com } 28410234Syasuko.eckert@amd.com 28510234Syasuko.eckert@amd.com if (device_type < 0) { 28610234Syasuko.eckert@amd.com errorUnspecifiedParam("device_type"); 28710234Syasuko.eckert@amd.com } 28810234Syasuko.eckert@amd.com 28910234Syasuko.eckert@amd.com if (physical_address_width <= 0) { 29010234Syasuko.eckert@amd.com errorNonPositiveParam("physical_address_width"); 29110234Syasuko.eckert@amd.com } 29210234Syasuko.eckert@amd.com 29310234Syasuko.eckert@amd.com if (data_path_width <= 0) { 29410234Syasuko.eckert@amd.com errorNonPositiveParam("machine_bits"); 29510234Syasuko.eckert@amd.com } 29610234Syasuko.eckert@amd.com 29710234Syasuko.eckert@amd.com if (total_cycles <= 0) { 29810234Syasuko.eckert@amd.com fprintf(stderr, "WARNING: total_cycles <= 0 in system component, ", 29910234Syasuko.eckert@amd.com "power numbers will be funky...\n"); 30010234Syasuko.eckert@amd.com } 30110234Syasuko.eckert@amd.com 30210234Syasuko.eckert@amd.com clockRate = target_core_clockrate; 30310234Syasuko.eckert@amd.com execution_time = total_cycles / (target_core_clockrate); 30410234Syasuko.eckert@amd.com 30510234Syasuko.eckert@amd.com /* Basic parameters*/ 30610234Syasuko.eckert@amd.com interface_ip.data_arr_ram_cell_tech_type = device_type; 30710234Syasuko.eckert@amd.com interface_ip.data_arr_peri_global_tech_type = device_type; 30810234Syasuko.eckert@amd.com interface_ip.tag_arr_ram_cell_tech_type = device_type; 30910234Syasuko.eckert@amd.com interface_ip.tag_arr_peri_global_tech_type = device_type; 31010234Syasuko.eckert@amd.com 31110234Syasuko.eckert@amd.com interface_ip.ic_proj_type = interconnect_projection_type; 31210234Syasuko.eckert@amd.com interface_ip.temp = temperature; 31310234Syasuko.eckert@amd.com interface_ip.F_sz_nm = core_tech_node; 31410234Syasuko.eckert@amd.com interface_ip.F_sz_um = interface_ip.F_sz_nm / 1000; 31510234Syasuko.eckert@amd.com interface_ip.is_main_mem = false; 31610234Syasuko.eckert@amd.com 31710234Syasuko.eckert@amd.com // These are there just to make CACTI's error_checking() happy. 31810234Syasuko.eckert@amd.com // They are either not actually used or overwritten by each component. 31910234Syasuko.eckert@amd.com interface_ip.cache_sz = MIN_BUFFER_SIZE; 32010234Syasuko.eckert@amd.com interface_ip.nbanks = 1; 32110234Syasuko.eckert@amd.com interface_ip.out_w = 0; 32210234Syasuko.eckert@amd.com interface_ip.line_sz = 1; 32310234Syasuko.eckert@amd.com interface_ip.assoc = 1; 32410234Syasuko.eckert@amd.com interface_ip.num_rw_ports = 1; 32510234Syasuko.eckert@amd.com interface_ip.num_search_ports = 1; 32610234Syasuko.eckert@amd.com interface_ip.is_cache = true; 32710234Syasuko.eckert@amd.com interface_ip.pure_ram = false; 32810234Syasuko.eckert@amd.com interface_ip.pure_cam = false; 32910234Syasuko.eckert@amd.com 33010234Syasuko.eckert@amd.com 33110234Syasuko.eckert@amd.com //This section of code does not have real meaning; it is just to ensure 33210234Syasuko.eckert@amd.com //all data will have initial value to prevent errors. 33310234Syasuko.eckert@amd.com //They will be overridden during each components initialization 33410234Syasuko.eckert@amd.com interface_ip.specific_tag = 1; 33510234Syasuko.eckert@amd.com interface_ip.tag_w = 64; 33610234Syasuko.eckert@amd.com interface_ip.access_mode = 2; 33710234Syasuko.eckert@amd.com 33810234Syasuko.eckert@amd.com interface_ip.obj_func_dyn_energy = 0; 33910234Syasuko.eckert@amd.com interface_ip.obj_func_dyn_power = 0; 34010234Syasuko.eckert@amd.com interface_ip.obj_func_leak_power = 0; 34110234Syasuko.eckert@amd.com interface_ip.obj_func_cycle_t = 1; 34210234Syasuko.eckert@amd.com interface_ip.num_rw_ports = 1; 34310234Syasuko.eckert@amd.com interface_ip.num_rd_ports = 0; 34410234Syasuko.eckert@amd.com interface_ip.num_wr_ports = 0; 34510234Syasuko.eckert@amd.com interface_ip.num_se_rd_ports = 0; 34610234Syasuko.eckert@amd.com} 34710234Syasuko.eckert@amd.com 34810234Syasuko.eckert@amd.comSystem::~System() { 34910234Syasuko.eckert@amd.com // TODO: Delete children... do this in McPATComponent 35010234Syasuko.eckert@amd.com}; 351