Searched refs:Stage2MMU (Results 1 - 6 of 6) sorted by relevance
/gem5/src/arch/arm/ |
H A D | stage2_mmu.cc | 51 Stage2MMU::Stage2MMU(const Params *p) function in class:Stage2MMU 64 Stage2MMU::readDataUntimed(ThreadContext *tc, Addr oVAddr, Addr descAddr, 101 Stage2MMU::readDataTimed(ThreadContext *tc, Addr descAddr, 111 Stage2MMU::Stage2Translation::Stage2Translation(Stage2MMU &_parent, 120 Stage2MMU::Stage2Translation::finish(const Fault &_fault, 145 ArmISA::Stage2MMU * 148 return new ArmISA::Stage2MMU(this);
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H A D | stage2_mmu.hh | 52 class Stage2MMU : public SimObject class in namespace:ArmISA 77 Stage2MMU &parent; 83 Stage2Translation(Stage2MMU &_parent, uint8_t *_data, Event *_event, 106 Stage2MMU(const Params *p);
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H A D | tlb.hh | 63 class Stage2MMU; 165 Stage2MMU *stage2Mmu; 228 void setMMU(Stage2MMU *m, MasterID master_id);
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H A D | table_walker.hh | 62 class Stage2MMU; 827 Stage2MMU *stage2Mmu; 914 void setMMU(Stage2MMU *m, MasterID master_id);
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H A D | table_walker.cc | 102 TableWalker::setMMU(Stage2MMU *m, MasterID master_id) 1993 Stage2MMU::Stage2Translation *tran = new 1994 Stage2MMU::Stage2Translation(*stage2Mmu, data, event,
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H A D | tlb.cc | 111 TLB::setMMU(Stage2MMU *m, MasterID master_id)
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