Searched refs:SimObject (Results 1 - 25 of 357) sorted by relevance

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/gem5/src/arch/alpha/
H A DAlphaInterrupts.py29 from m5.SimObject import SimObject
31 class AlphaInterrupts(SimObject):
H A DAlphaISA.py40 from m5.SimObject import SimObject
42 class AlphaISA(SimObject):
/gem5/src/arch/arm/
H A DArmInterrupts.py29 from m5.SimObject import SimObject
31 class ArmInterrupts(SimObject):
/gem5/src/arch/mips/
H A DMipsInterrupts.py29 from m5.SimObject import SimObject
31 class MipsInterrupts(SimObject):
/gem5/src/arch/power/
H A DPowerISA.py38 from m5.SimObject import SimObject
40 class PowerISA(SimObject):
H A DPowerInterrupts.py29 from m5.SimObject import SimObject
31 class PowerInterrupts(SimObject):
/gem5/src/arch/sparc/
H A DSparcISA.py38 from m5.SimObject import SimObject
40 class SparcISA(SimObject):
H A DSparcInterrupts.py29 from m5.SimObject import SimObject
31 class SparcInterrupts(SimObject):
/gem5/src/arch/x86/
H A DX86ISA.py38 from m5.SimObject import SimObject
40 class X86ISA(SimObject):
/gem5/src/arch/riscv/
H A DRiscvISA.py45 from m5.SimObject import SimObject
47 class RiscvISA(SimObject):
H A DRiscvInterrupts.py34 from m5.SimObject import SimObject
36 class RiscvInterrupts(SimObject):
/gem5/src/learning_gem5/part2/
H A DSimpleObject.py31 from m5.SimObject import SimObject
33 class SimpleObject(SimObject):
/gem5/src/base/
H A DGraphics.py38 from m5.SimObject import SimObject
H A DCPA.py1 from m5.SimObject import SimObject
4 class CPA(SimObject):
/gem5/src/sim/
H A DInstTracer.py29 from m5.SimObject import SimObject
32 class InstTracer(SimObject):
H A DVoltageDomain.py39 from m5.SimObject import SimObject
42 class VoltageDomain(SimObject):
H A DSubSystem.py39 from m5.SimObject import SimObject
50 class SubSystem(SimObject):
59 generateDeviceTree = SimObject.recurseDeviceTree
/gem5/src/dev/arm/
H A DAbstractNVM.py41 from m5.SimObject import SimObject
43 class AbstractNVM(SimObject):
/gem5/src/cpu/kvm/
H A DKvmVM.py41 from m5.SimObject import SimObject
43 class KvmVM(SimObject):
/gem5/src/sim/probe/
H A DProbe.py40 from m5.SimObject import SimObject
44 class ProbeListenerObject(SimObject):
47 manager = Param.SimObject(Parent.any, "ProbeManager")
/gem5/src/cpu/
H A DIntrControl.py29 from m5.SimObject import SimObject
32 class IntrControl(SimObject):
/gem5/src/dev/storage/
H A DSimpleDisk.py29 from m5.SimObject import SimObject
33 class SimpleDisk(SimObject):
/gem5/src/mem/ruby/structures/
H A DWireBuffer.py31 from m5.SimObject import SimObject
33 class RubyWireBuffer(SimObject):
H A DDirectoryMemory.py44 from m5.SimObject import SimObject
46 class RubyDirectoryMemory(SimObject):
/gem5/src/mem/ruby/network/fault_model/
H A DFaultModel.py37 from m5.SimObject import SimObject
39 class FaultModel(SimObject):

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