Searched refs:PCHIP_PCI0_MEMORY (Results 1 - 2 of 2) sorted by relevance

/gem5/src/dev/alpha/
H A Dtsunamireg.h142 #define PCHIP_PCI0_MEMORY ULL(0x00000000000) macro
145 #define TSUNAMI_PCI0_MEMORY TSUNAMI_UNCACHABLE_BIT + PCHIP_PCI0_MEMORY
/gem5/src/dev/mips/
H A Dmaltareg.h153 #define PCHIP_PCI0_MEMORY ULL(0x00000000000) macro
156 #define TSUNAMI_PCI0_MEMORY TSUNAMI_UNCACHABLE_BIT + PCHIP_PCI0_MEMORY

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