Searched refs:MISCREG_SP_EL0 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/
H A Dmiscregs.hh494 MISCREG_SP_EL0, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc635 case MISCREG_SP_EL0:
1879 case MISCREG_SP_EL0:
H A Dmiscregs.cc1121 if ((reg == MISCREG_SP_EL0) && (tc->readMiscReg(MISCREG_SPSEL) == 0))
1159 if ((reg == MISCREG_SP_EL0) && (tc->readMiscReg(MISCREG_SPSEL) == 0))
1996 return MISCREG_SP_EL0;
4074 InitReg(MISCREG_SP_EL0)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc455 { "sp_el0", MISCREG_SP_EL0 },

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