Searched refs:MISCREG_REVIDR (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Dutility.cc493 case MISCREG_REVIDR:
H A Dmiscregs.hh149 MISCREG_REVIDR, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc520 case MISCREG_REVIDR: // not implemented, so alias MIDR
H A Dmiscregs.cc150 return MISCREG_REVIDR;
3122 InitReg(MISCREG_REVIDR)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc137 { "revidr", MISCREG_REVIDR },

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