Searched refs:MISCREG_MVFR0 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/
H A Dmiscregs.hh71 MISCREG_MVFR0, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc158 miscRegs[MISCREG_MVFR0] = mvfr0;
1091 case MISCREG_MVFR0:
H A Dmiscregs.cc2919 InitReg(MISCREG_MVFR0)
/gem5/src/arch/arm/kvm/
H A Darm_cpu.cc420 case KVM_REG_ARM_VFP_MVFR0: return MISCREG_MVFR0;

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