Searched refs:MISCREG_ID_MMFR0 (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Disa.cc251 miscRegs[MISCREG_ID_MMFR0] = (miscRegs[MISCREG_ID_MMFR0] & ~0xf) | 0x5;
330 miscRegs[MISCREG_ID_MMFR0] = p->id_mmfr0;
1077 case MISCREG_ID_MMFR0:
H A Dutility.cc509 case MISCREG_ID_MMFR0:
H A Dmiscregs.hh154 MISCREG_ID_MMFR0, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc166 return MISCREG_ID_MMFR0;
3134 InitReg(MISCREG_ID_MMFR0)
3900 .mapsTo(MISCREG_ID_MMFR0);
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc142 { "id_mmfr0", MISCREG_ID_MMFR0 },

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