Searched refs:MISCREG_AIDR (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Dutility.cc496 case MISCREG_AIDR:
H A Dmiscregs.hh166 MISCREG_AIDR, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc533 case MISCREG_AIDR: // AUX ID set to 0
H A Dmiscregs.cc206 return MISCREG_AIDR;
3158 InitReg(MISCREG_AIDR)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc154 { "aidr", MISCREG_AIDR },

Completed in 34 milliseconds