Searched refs:mask (Results 51 - 75 of 141) sorted by relevance

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/gem5/src/arch/sparc/insts/
H A Dbranch.hh84 sext<bits + 2>((_machInst & mask(bits)) << 2))
/gem5/util/m5/
H A Dm5.c315 cpu_set_t mask; local
316 CPU_ZERO(&mask);
321 CPU_SET(atoi(target), &mask); local
325 if (sched_setaffinity(0, sizeof(cpu_set_t), &mask) < 0)
/gem5/src/systemc/tests/systemc/examples/trie/
H A Dtrie.cpp117 sc_uint<32> mask; local
138 mask = ~0 << (32-LEN(t));
139 if( (ip_prefix&mask) == (ip&mask)){
/gem5/src/dev/x86/
H A Di82094aa.hh57 Bitfield<16> mask; member in class:X86ISA::I82094AA
H A Di8259.cc164 DPRINTF(I8259, "%s special mask mode.\n",
182 vectorOffset = val & ~mask(3);
184 vectorOffset, vectorOffset | mask(3));
206 DPRINTF(I8259, "Slave ID is %d.\n", val & mask(3));
207 cascadeBits = val & mask(3);
/gem5/src/dev/sparc/
H A Diob.cc33 * interrupts and posts them to the CPU when needed. It holds mask registers and
70 intCtl[x].mask = true;
106 uint64_t data = intCtl[index].mask ? 1 << 2 : 0 |
206 intCtl[index].mask = bits(data,2,2);
267 if (intCtl[devid].mask)
269 intCtl[devid].mask = true;
351 paramOut(cp, "mask", intCtl[x].mask);
371 paramIn(cp, "mask", intCtl[x].mask);
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/gem5/src/arch/sparc/
H A Disa.cc49 PSTATE mask = 0; local
50 mask.ie = 1;
51 mask.priv = 1;
52 mask.am = 1;
53 mask.pef = 1;
54 mask.mm = 3;
55 mask.tle = 1;
56 mask.cle = 1;
57 mask.pid1 = 1;
58 return mask;
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H A Dpagetable.hh178 Addr mask = sizeMask(); local
179 return (paddr() & ~mask) | (vaddr & mask);
/gem5/ext/systemc/src/sysc/datatypes/int/
H A Dsc_unsigned.cpp150 sc_digit mask; // Mask for partial word sets. local
165 mask = ~(-1 << left_shift);
166 dst_p[dst_i] = ( dst_p[dst_i] & ~mask );
182 sc_digit mask; // Mask for partial word sets. local
211 mask = ~(-1 << left_shift);
212 dst_p[dst_i] = ( ( dst_p[dst_i] & mask ) |
226 mask = ~(-2 << high_i) & DIGIT_MASK;
227 dst_p[dst_i] = digit[src_i] & mask;
237 mask = ~(-1 << left_shift);
239 dst_p[dst_i] = (dst_p[dst_i] & mask) |
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/gem5/src/systemc/dt/int/
H A Dsc_unsigned.cc171 sc_digit mask; // Mask for partial word sets. local
184 mask = ~(~0U << left_shift);
185 dst_p[dst_i] = (dst_p[dst_i] & ~mask);
203 sc_digit mask; // Mask for partial word sets. local
224 mask = ~(~0U << left_shift);
225 dst_p[dst_i] = ((dst_p[dst_i] & mask) |
234 mask = ~(~1U << high_i) & DIGIT_MASK;
235 dst_p[dst_i] = digit[src_i] & mask;
241 mask = ~(~0U << left_shift);
243 dst_p[dst_i] = (dst_p[dst_i] & mask) |
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/gem5/src/arch/hsail/insts/
H A Dmain.cc134 const VectorMask &mask = w->getPred(); local
136 // mask off completed work-items
138 if (mask[lane]) {
/gem5/ext/systemc/src/sysc/utils/
H A Dsc_report_handler.cpp521 int mask = 1 << (severity_ + 1); local
522 int old = md->limit_mask & mask ? md->sev_limit[severity_]: UINT_MAX;
525 md->limit_mask &= ~mask;
528 md->limit_mask |= mask;
534 sc_actions sc_report_handler::suppress(sc_actions mask) argument
537 suppress_mask = mask;
546 sc_actions sc_report_handler::force(sc_actions mask) argument
549 force_mask = mask;
/gem5/src/arch/arm/
H A Disa.hh147 chain res0(uint64_t mask) const {
148 entry._res0 = mask;
151 chain res1(uint64_t mask) const {
152 entry._res1 = mask;
155 chain raz(uint64_t mask) const {
156 entry._raz = mask;
159 chain rao(uint64_t mask) const {
160 entry._rao = mask;
H A Dutility.cc392 return addr | mask(63, 55);
400 return addr & mask(56);
405 return addr & mask(56);
425 return addr | mask(63, 55);
433 return addr & mask(56);
439 return addr & mask(56);
/gem5/src/arch/arm/insts/
H A Dvfp.cc195 finishVfp(FPSCR &fpscr, VfpSavedState state, bool flush, FPSCR mask) argument
199 if ((exceptions & FeInvalid) && mask.ioc) {
202 if ((exceptions & FeDivByZero) && mask.dzc) {
205 if ((exceptions & FeOverflow) && mask.ofc) {
210 if (mask.ufc)
213 if ((exceptions & FeInexact) && !(underflow && flush) && mask.ixc) {
334 (mask(9) << 22) |
370 (mask(12) << 51) |
419 uint64_t extra = oldMantissa & mask(mWidth - 10);
420 if (exponent == mask(eWidt
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/gem5/src/base/loader/
H A Delf_object.hh83 bool loadSomeSymbols(SymbolTable *symtab, int binding, Addr mask,
/gem5/src/mem/
H A Dpage_table.hh77 pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
/gem5/ext/dnet/
H A Dicmp.h78 #define ICMP_MASK 17 /* address mask request */
79 #define ICMP_MASKREPLY 18 /* address mask reply */
162 * Address mask message data, RFC 950
167 uint32_t icmp_mask; /* address mask */
215 struct icmp_msg_mask mask; /* ICMP_MASK{REPLY} */ member in union:icmp_msg
247 #define icmp_pack_hdr_mask(hdr, type, code, id, seq, mask) do { \
253 mask_pack_p->icmp_mask = htonl(mask); \
/gem5/src/arch/mips/
H A Dpra_constants.hh72 Bitfield<28, 13> mask; member in namespace:MipsISA
93 Bitfield<3, 0> mask; member in namespace:MipsISA
289 Bitfield<11, 3> mask; member in namespace:MipsISA
H A Ddsp.cc1162 MipsISA::writeDSPControl(uint32_t *dspctl, uint32_t value, uint32_t mask) argument
1166 if (mask & 0x01) fmask |= DSP_CTL_MASK[DSP_POS];
1167 if (mask & 0x02) fmask |= DSP_CTL_MASK[DSP_SCOUNT];
1168 if (mask & 0x04) fmask |= DSP_CTL_MASK[DSP_C];
1169 if (mask & 0x08) fmask |= DSP_CTL_MASK[DSP_OUFLAG];
1170 if (mask & 0x10) fmask |= DSP_CTL_MASK[DSP_CCOND];
1171 if (mask & 0x20) fmask |= DSP_CTL_MASK[DSP_EFI];
1179 MipsISA::readDSPControl(uint32_t *dspctl, uint32_t mask) argument
1183 if (mask & 0x01) fmask |= DSP_CTL_MASK[DSP_POS];
1184 if (mask
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/gem5/src/arch/riscv/
H A Dpra_constants.hh72 Bitfield<28, 13> mask; member in namespace:RiscvISA
93 Bitfield<3, 0> mask; member in namespace:RiscvISA
289 Bitfield<11, 3> mask; member in namespace:RiscvISA
/gem5/ext/systemc/src/sysc/datatypes/bit/
H A Dsc_bv_base.h311 sc_digit mask = SC_DIGIT_ONE << bi; local
312 m_data[wi] |= mask; // set bit to 1
313 m_data[wi] &= value << bi | ~mask;
/gem5/src/dev/arm/
H A Dhdlcd.hh236 uint32_t int_mask; /**< Interrupt mask register */
288 * @param mask New interrupt mask
290 void setInterrupts(uint32_t ints, uint32_t mask);
293 * Convenience function to update the interrupt mask
296 * @param mask New interrupt mask
298 void intMask(uint32_t mask) { setInterrupts(int_rawstat, mask); } argument
/gem5/src/systemc/tests/tlm/endian_conv/
H A Dtest_endian_conv.cpp349 sc_dt::uint64 mask = sizeof_databus - 1; local
361 sc_dt::uint64 new_addr = txn->get_address() & ~mask;
376 sc_dt::uint64 he_addr = curr_a ^ mask;
395 sc_dt::uint64 mask = sizeof_databus - 1; local
409 sc_dt::uint64 he_addr = curr_a ^ mask;
/gem5/src/arch/x86/
H A Dinterrupts.cc85 paddr &= ~mask(3);
195 if ((offset & ~mask(3)) != ((offset + pkt->getSize()) & ~mask(3)))
202 pkt->setData(((uint8_t *)&val) + (offset & mask(3)));
212 if ((offset & ~mask(3)) != ((offset + pkt->getSize()) & ~mask(3)))
216 pkt->writeData(((uint8_t *)&val) + (offset & mask(3)));

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