Searched refs:create (Results 326 - 350 of 355) sorted by relevance

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/gem5/src/gpu-compute/
H A Dgpu_tlb.cc114 // create the slave ports based on the number of connected ports
120 // create the master ports based on the number of connected ports
1091 * We create and schedule a new TLBEvent which will help us take the
1406 * protection checks. It does NOT create a new packet to
1710 page_stat_file = simout.create(name().c_str())->stream();
1795 X86GPUTLBParams::create() function in class:X86GPUTLBParams
H A Dcompute_unit.cc830 // here we create the new packet so we can set the size, addr,
897 // the addr of the packet is not modified, so we need to create a new
964 // create packet
1063 ComputeUnitParams::create() function in class:ComputeUnitParams
1717 simout.create(computeUnit->name().c_str())->stream();
H A Dwavefront.cc46 WavefrontParams::create() function in class:WavefrontParams
/gem5/src/base/
H A Dcp_annotate.cc139 osbin = simout.create("annotate.bin", true);
1407 CPAParams::create() function in class:CPAParams
/gem5/src/dev/storage/
H A Dide_disk.cc1210 IdeDiskParams::create() function in class:IdeDiskParams
/gem5/src/arch/arm/kvm/
H A Darm_cpu.cc866 ArmKvmCPUParams::create() function in class:ArmKvmCPUParams
/gem5/src/dev/arm/
H A Dgic_v2.cc1085 GicV2Params::create()
H A Dsmmu_v3.cc832 SMMUv3Params::create() function in class:SMMUv3Params
H A Dgic_v3_its.cc1293 Gicv3ItsParams::create() function in class:Gicv3ItsParams
H A Dufs_device.cc768 UFSHostDeviceParams::create() function in class:UFSHostDeviceParams
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc1135 TarmacParserParams::create() function in class:TarmacParserParams
/gem5/src/mem/ruby/system/
H A DGPUCoalescer.cc67 RubyGPUCoalescerParams::create() function in class:RubyGPUCoalescerParams
/gem5/src/mem/cache/
H A Dcache.cc364 // create a new pair with a different lifecycle. Note that this
376 // If this is the case, we don't even create a request at all.
380 // copy the request and create a new SoftPFReq packet
438 // create a downstream express snoop with cleared packet
1421 CacheParams::create() function in class:CacheParams
/gem5/src/cpu/pred/
H A Dtage_base.cc824 TAGEBaseParams::create() function in class:TAGEBaseParams
/gem5/src/cpu/trace/
H A Dtrace_cpu.cc90 TraceCPUParams::create() function in class:TraceCPUParams
149 // this point so create an event and pass it.
/gem5/src/mem/
H A Dcoherent_xbar.cc67 // create the ports based on the size of the master and slave
95 // create the slave ports, once again starting at zero
136 // inform the snoop filter about the slave ports so it can create
1134 CoherentXBarParams::create() function in class:CoherentXBarParams
/gem5/src/cpu/simple/
H A Dtiming.cc1079 TimingSimpleCPUParams::create()
/gem5/ext/pybind11/tests/
H A Dtest_eigen.py116 assert m.cpp_ref_any(m.ReturnTester.create()) == 1.
/gem5/src/cpu/kvm/
H A Dx86_cpu.cc562 // TODO: Do we need to create an identity mapped TSS area? We
1624 X86KvmCPUParams::create() function in class:X86KvmCPUParams
/gem5/src/dev/net/
H A Dsinic.cc1529 SinicParams::create() function in class:SinicParams
H A Dns_gige.cc2375 NSGigEParams::create() function in class:NSGigEParams
/gem5/src/python/m5/
H A DSimObject.py65 # load (when SimObject class references Param to create a class
385 code(' return this->create();')
604 # object per port, but we create them lazily here.
731 code('.def("create", &${cls}Params::create)')
915 code(" ${{cls.cxx_type}} create();")
1240 # create a new dict and use that.
1251 # object per port, but we create them lazily here.
1619 # necessary to construct it. Does *not* recursively create
1631 self._ccObject = params.create()
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/gem5/src/arch/sparc/
H A Dtlb.cc1423 SparcTLBParams::create() function in class:SparcTLBParams
/gem5/src/arch/arm/
H A Dtlb.cc1628 ArmTLBParams::create() function in class:ArmTLBParams
H A Disa.cc2096 // We only need to create an ISA interface the first time we try
2177 ArmISAParams::create()

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