Searched refs:clock (Results 201 - 225 of 302) sorted by relevance

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/gem5/src/systemc/tests/systemc/misc/synth/directives/resource/test6/
H A D	main.cpp	48 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 70 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/
H A D	main.cpp	48 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 70 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/
H A D	main.cpp	48 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 70 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/
H A D	main.cpp	48 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 70 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/
H A D	main.cpp	48 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 70 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/
H A D	main.cpp	48 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 70 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test02/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test03/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test04/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test05/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test06/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test07/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test08/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test09/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test10/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test11/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test12/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test13/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test14/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test15/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test16/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/synth/wait_until/test17/
H A D	main.cpp	47 sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); 69 test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5,
/gem5/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/
H A D	test3.cpp	105 sc_clock clock("Clock", 20, SC_NS); 108 p2 Proc2("Proc2", clock, a, 129);
/gem5/tests/configs/
H A D	memtest.py	42 # Dummy voltage domain for all our clock domains 44 system.clk_domain = SrcClockDomain(clock = '1GHz', 47 # Create a seperate clock domain for components that should run at 49 system.cpu_clk_domain = SrcClockDomain(clock = '2GHz',
H A D	memtest-filter.py	42 # Dummy voltage domain for all our clock domains 44 system.clk_domain = SrcClockDomain(clock = '1GHz', 47 # Create a seperate clock domain for components that should run at 49 system.cpu_clk_domain = SrcClockDomain(clock = '2GHz',

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Indexes created Thu Sep 26 06:36:22 EDT 2019