Searched refs:ULL (Results 51 - 75 of 93) sorted by relevance

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/gem5/src/arch/mips/
H A Dregisters.hh66 const uint64_t MIPS64_QNAN = ULL(0x7ff7ffffffffffff);
H A Dstacktrace.cc53 if (base == ULL(0xfffffc0000000000))
/gem5/src/arch/arm/
H A Dstacktrace.cc73 if (base == ULL(0xffffffffc0000000))
H A Dinterrupts.hh101 intStatus |= ULL(1) << int_num;
116 intStatus &= ~(ULL(1) << int_num);
H A Dtable_walker.cc586 ttbr0_max = (1ULL << (32 - currState->ttbcr.t0sz)) - 1;
588 ttbr0_max = (1ULL << 32) -
589 (1ULL << (32 - currState->ttbcr.t1sz)) - 1;
591 ttbr0_max = (1ULL << 32) - 1;
593 ttbr1_min = (1ULL << 32) - (1ULL << (32 - currState->ttbcr.t1sz));
595 ttbr1_min = (1ULL << (32 - currState->ttbcr.t0sz));
625 if (ttbr0_max < (1ULL << 30)) // Upper limit < 1 GB
649 if (ttbr1_min >= (1ULL << 31) + (1ULL << 3
[all...]
/gem5/src/arch/generic/linux/
H A Dthreadinfo.hh90 return sp & ~ULL(0x3fff);
/gem5/src/dev/sparc/
H A Diob.cc59 iobManAddr = ULL(0x9800000000);
60 iobManSize = ULL(0x0100000000);
61 iobJBusAddr = ULL(0x9F00000000);
62 iobJBusSize = ULL(0x0100000000);
/gem5/src/dev/net/
H A Dsinicreg.hh50 static const uint64_t NAME##_mask = (ULL(1) << WIDTH) - 1; \
51 static const uint64_t NAME = ((ULL(1) << WIDTH) - 1) << OFFSET; \
/gem5/src/systemc/core/
H A Devent.cc54 _triggeredStamp(~0ULL)
/gem5/src/systemc/tests/systemc/kernel/sc_event/test15/
H A Devent_triggered.cpp58 # define UINT64_C(v) v ## ULL
/gem5/src/arch/alpha/
H A Dtlb.cc412 req->setPaddr(req->getPaddr() | ULL(0xf0000000000));
414 req->setPaddr(req->getPaddr() & ULL(0xffffffffff));
508 req->setPaddr(req->getPaddr() | ULL(0xf0000000000));
510 req->setPaddr(req->getPaddr() & ULL(0xffffffffff));
H A Dstacktrace.cc80 if (base == ULL(0xfffffc0000000000))
/gem5/src/arch/x86/
H A Dstacktrace.cc73 if (base == ULL(0xfffffc0000000000))
H A Dinterrupts.cc386 regs[APIC_INTERNAL_STATE] &= ~ULL(0x1);
454 regs[APIC_INTERNAL_STATE] &= ~ULL(1 << 1);
462 regs[APIC_INTERNAL_STATE] &= ~ULL(0x1);
465 regs[APIC_INTERNAL_STATE] |= ULL(0x1);
/gem5/src/base/
H A Dbitfield.hh62 return (nbits == 64) ? (uint64_t)-1LL : (1ULL << nbits) - 1;
H A Dtrie.hh149 const Key msb = ULL(1) << (MaxBits - 1);
/gem5/src/cpu/pred/
H A Dloop_predictor.cc77 ltable = new LoopEntry[ULL(1) << logSizeLoopPred];
366 return (1ULL << logSizeLoopPred) *
H A Dmultiperspective_perceptron_tage.cc138 if (tCounter >= ((ULL(1) << logUResetPeriod))) {
141 for (int j = 0; j < (ULL(1) << logTagTableSizes[i]); j++) {
165 ((ULL(1) << (logTagTableSizes[0])) - 1));
H A Dtage_base.hh108 comp &= (ULL(1) << compLength) - 1;
/gem5/src/arch/arm/insts/
H A Dvfp.hh122 uint64_t bitMask = ULL(0x1) << (sizeof(fpType) * 8 - 1);
209 single ? 0x7fc00000 : ULL(0x7ff8000000000000);
602 uint64_t bitMask = ULL(0x1) << ((sizeof(T) * 8) - 1);
625 const uint64_t qnan = single ? 0x7fc00000 : ULL(0x7ff8000000000000);
653 const uint64_t qnan = single ? 0x7fc00000 : ULL(0x7ff8000000000000);
/gem5/src/dev/arm/
H A Dgic_v3_its.cc989 return event_id >= (1ULL << (id_bits + 1)) ||
990 event_id >= ((1ULL << itt_range) + 1);
996 return device_id >= (1ULL << (gitsTyper.devBits + 1));
1013 return collection_id >= (1ULL << cid_bits);
1019 return intid >= (1ULL << (Gicv3Distributor::IDBITS + 1)) ||
1272 const uint64_t largest_lpi_id = 1ULL << (rd1->lpiIDBits + 1);
H A Dpl111.hh64 static const uint64_t AMBA_ID = ULL(0xb105f00d00141111);
H A Dgic_v2.cc341 uint64_t sgi_num = ULL(1) << (ctx + 8 * iar.cpu_id);
345 uint64_t sgi_num = ULL(1) << iar.ack_id;
596 uint64_t clr_int = ULL(1) << (ctx + 8 * iar.cpu_id);
723 return ULL(0x0101010101010101) << cpu;
/gem5/util/statetrace/arch/arm/
H A Dtracechild.cc80 message[0] = message[0] | (1ULL << x);
/gem5/src/arch/sparc/
H A Disa.cc123 tick = ULL(1) << 63;
441 tba = val & ULL(~0x7FFF);

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