Searched hist:956 (Results 1 - 4 of 4) sorted by relevance
| /gem5/src/arch/mips/ | ||
| H A D | tlb.cc | diff 7708:956ac83b0a58 Sat Oct 16 03:00:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> Mem: Reclaim some request flags used by MIPS for alignment checking. These flags were being used to identify what alignment a request needed, but the same information is available using the request size. This change also eliminates the isMisaligned function. If more complicated alignment checks are needed, they can be signaled using the ASI_BITS space in the flags vector like is currently done with ARM. |
| /gem5/src/arch/mips/isa/ | ||
| H A D | decoder.isa | diff 7708:956ac83b0a58 Sat Oct 16 03:00:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> Mem: Reclaim some request flags used by MIPS for alignment checking. These flags were being used to identify what alignment a request needed, but the same information is available using the request size. This change also eliminates the isMisaligned function. If more complicated alignment checks are needed, they can be signaled using the ASI_BITS space in the flags vector like is currently done with ARM. |
| /gem5/src/arch/x86/isa/microops/ | ||
| H A D | regop.isa | diff 5076:956a475dddea Thu Sep 13 19:35:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> X86: Make the shift and rotate instructions set the carry flag(s) and overflow flags like they're supposed to. |
| /gem5/src/mem/ | ||
| H A D | request.hh | diff 7708:956ac83b0a58 Sat Oct 16 03:00:00 EDT 2010 Gabe Black <gblack@eecs.umich.edu> Mem: Reclaim some request flags used by MIPS for alignment checking. These flags were being used to identify what alignment a request needed, but the same information is available using the request size. This change also eliminates the isMisaligned function. If more complicated alignment checks are needed, they can be signaled using the ASI_BITS space in the flags vector like is currently done with ARM. |
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