Searched hist:8187 (Results 1 - 4 of 4) sorted by relevance
/gem5/src/cpu/ | ||
H A D | StaticInstFlags.py | diff 12768:9a299ec956ac Mon Feb 12 23:19:00 EST 2018 Tuan Ta <qtt2@cornell.edu> cpu: add a new instruction type 'Atomic' This patch adds a new flag named 'Atomic' to support ISA implementations that use AtomicOpFunctor to handle atomic instructions instead of a pair of locking load and unlocking store. Change-Id: I1fbee6e54432396cb49dfc59ad9006b75812d115 Reviewed-on: https://gem5-review.googlesource.com/8187 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> |
H A D | static_inst.hh | diff 12768:9a299ec956ac Mon Feb 12 23:19:00 EST 2018 Tuan Ta <qtt2@cornell.edu> cpu: add a new instruction type 'Atomic' This patch adds a new flag named 'Atomic' to support ISA implementations that use AtomicOpFunctor to handle atomic instructions instead of a pair of locking load and unlocking store. Change-Id: I1fbee6e54432396cb49dfc59ad9006b75812d115 Reviewed-on: https://gem5-review.googlesource.com/8187 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> |
H A D | base_dyn_inst.hh | diff 12768:9a299ec956ac Mon Feb 12 23:19:00 EST 2018 Tuan Ta <qtt2@cornell.edu> cpu: add a new instruction type 'Atomic' This patch adds a new flag named 'Atomic' to support ISA implementations that use AtomicOpFunctor to handle atomic instructions instead of a pair of locking load and unlocking store. Change-Id: I1fbee6e54432396cb49dfc59ad9006b75812d115 Reviewed-on: https://gem5-review.googlesource.com/8187 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com> |
/gem5/src/mem/slicc/symbols/ | ||
H A D | StateMachine.py | diff 8187:99428f716e7b Thu Mar 31 03:20:00 EDT 2011 Lisa Hsu <Lisa.Hsu@amd.com> Ruby: Bug in SLICC forgot semicolon at end of code. |
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