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| /gem5/src/arch/arm/isa/insts/ | ||
| H A D | str.isa | diff 7746:79adfecb2b8a Mon Nov 15 15:04:00 EST 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Fix SRS instruction to micro-code memory operation and register update. Previously the SRS instruction attempted to writeback in initiateAcc() which worked until a recent change, but was incorrect. |
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