Searched hist:7350 (Results 1 - 12 of 12) sorted by relevance
/gem5/src/arch/arm/isa/decoder/ | ||
H A D | arm.isa | diff 7350:41e3ee23125e Wed Jun 02 01:58:00 EDT 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Add some support for wfi/wfe/yield/etc |
/gem5/src/gpu-compute/ | ||
H A D | gpu_tlb.cc | diff 12461:a4cb506cda74 Tue Jan 09 02:37:00 EST 2018 Gabe Black <gabeblack@google.com> tarch, mem: Abstract the data stored in the SE page tables. Rather than store the actual TLB entry that corresponds to a mapping, we can just store some abstracted information (address, a few flags) and then let the caller turn that into the appropriate entry. There could potentially be some small amount of overhead from creating entries vs. storing them and just installing them, but it's likely pretty minimal since that only happens on a TLB miss (ideally rare), and, if it is problematic, there could be some preallocated TLB entries which are just minimally filled in as necessary. This has the nice effect of finally making the page tables ISA agnostic. Change-Id: I11e630f60682f0a0029b0683eb8ff0135fbd4317 Reviewed-on: https://gem5-review.googlesource.com/7350 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
/gem5/src/arch/arm/isa/ | ||
H A D | includes.isa | diff 7350:41e3ee23125e Wed Jun 02 01:58:00 EDT 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Add some support for wfi/wfe/yield/etc |
H A D | operands.isa | diff 7350:41e3ee23125e Wed Jun 02 01:58:00 EDT 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Add some support for wfi/wfe/yield/etc |
/gem5/src/arch/alpha/ | ||
H A D | faults.cc | diff 12461:a4cb506cda74 Tue Jan 09 02:37:00 EST 2018 Gabe Black <gabeblack@google.com> tarch, mem: Abstract the data stored in the SE page tables. Rather than store the actual TLB entry that corresponds to a mapping, we can just store some abstracted information (address, a few flags) and then let the caller turn that into the appropriate entry. There could potentially be some small amount of overhead from creating entries vs. storing them and just installing them, but it's likely pretty minimal since that only happens on a TLB miss (ideally rare), and, if it is problematic, there could be some preallocated TLB entries which are just minimally filled in as necessary. This has the nice effect of finally making the page tables ISA agnostic. Change-Id: I11e630f60682f0a0029b0683eb8ff0135fbd4317 Reviewed-on: https://gem5-review.googlesource.com/7350 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
/gem5/src/mem/ | ||
H A D | page_table.cc | diff 12461:a4cb506cda74 Tue Jan 09 02:37:00 EST 2018 Gabe Black <gabeblack@google.com> tarch, mem: Abstract the data stored in the SE page tables. Rather than store the actual TLB entry that corresponds to a mapping, we can just store some abstracted information (address, a few flags) and then let the caller turn that into the appropriate entry. There could potentially be some small amount of overhead from creating entries vs. storing them and just installing them, but it's likely pretty minimal since that only happens on a TLB miss (ideally rare), and, if it is problematic, there could be some preallocated TLB entries which are just minimally filled in as necessary. This has the nice effect of finally making the page tables ISA agnostic. Change-Id: I11e630f60682f0a0029b0683eb8ff0135fbd4317 Reviewed-on: https://gem5-review.googlesource.com/7350 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
H A D | page_table.hh | diff 12461:a4cb506cda74 Tue Jan 09 02:37:00 EST 2018 Gabe Black <gabeblack@google.com> tarch, mem: Abstract the data stored in the SE page tables. Rather than store the actual TLB entry that corresponds to a mapping, we can just store some abstracted information (address, a few flags) and then let the caller turn that into the appropriate entry. There could potentially be some small amount of overhead from creating entries vs. storing them and just installing them, but it's likely pretty minimal since that only happens on a TLB miss (ideally rare), and, if it is problematic, there could be some preallocated TLB entries which are just minimally filled in as necessary. This has the nice effect of finally making the page tables ISA agnostic. Change-Id: I11e630f60682f0a0029b0683eb8ff0135fbd4317 Reviewed-on: https://gem5-review.googlesource.com/7350 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
/gem5/src/arch/arm/ | ||
H A D | isa.hh | diff 7350:41e3ee23125e Wed Jun 02 01:58:00 EDT 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Add some support for wfi/wfe/yield/etc |
H A D | miscregs.hh | diff 7350:41e3ee23125e Wed Jun 02 01:58:00 EDT 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Add some support for wfi/wfe/yield/etc |
/gem5/src/arch/sparc/ | ||
H A D | faults.cc | diff 12461:a4cb506cda74 Tue Jan 09 02:37:00 EST 2018 Gabe Black <gabeblack@google.com> tarch, mem: Abstract the data stored in the SE page tables. Rather than store the actual TLB entry that corresponds to a mapping, we can just store some abstracted information (address, a few flags) and then let the caller turn that into the appropriate entry. There could potentially be some small amount of overhead from creating entries vs. storing them and just installing them, but it's likely pretty minimal since that only happens on a TLB miss (ideally rare), and, if it is problematic, there could be some preallocated TLB entries which are just minimally filled in as necessary. This has the nice effect of finally making the page tables ISA agnostic. Change-Id: I11e630f60682f0a0029b0683eb8ff0135fbd4317 Reviewed-on: https://gem5-review.googlesource.com/7350 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
/gem5/src/arch/x86/ | ||
H A D | tlb.cc | diff 12461:a4cb506cda74 Tue Jan 09 02:37:00 EST 2018 Gabe Black <gabeblack@google.com> tarch, mem: Abstract the data stored in the SE page tables. Rather than store the actual TLB entry that corresponds to a mapping, we can just store some abstracted information (address, a few flags) and then let the caller turn that into the appropriate entry. There could potentially be some small amount of overhead from creating entries vs. storing them and just installing them, but it's likely pretty minimal since that only happens on a TLB miss (ideally rare), and, if it is problematic, there could be some preallocated TLB entries which are just minimally filled in as necessary. This has the nice effect of finally making the page tables ISA agnostic. Change-Id: I11e630f60682f0a0029b0683eb8ff0135fbd4317 Reviewed-on: https://gem5-review.googlesource.com/7350 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
/gem5/src/sim/ | ||
H A D | syscall_emul.hh | diff 12461:a4cb506cda74 Tue Jan 09 02:37:00 EST 2018 Gabe Black <gabeblack@google.com> tarch, mem: Abstract the data stored in the SE page tables. Rather than store the actual TLB entry that corresponds to a mapping, we can just store some abstracted information (address, a few flags) and then let the caller turn that into the appropriate entry. There could potentially be some small amount of overhead from creating entries vs. storing them and just installing them, but it's likely pretty minimal since that only happens on a TLB miss (ideally rare), and, if it is problematic, there could be some preallocated TLB entries which are just minimally filled in as necessary. This has the nice effect of finally making the page tables ISA agnostic. Change-Id: I11e630f60682f0a0029b0683eb8ff0135fbd4317 Reviewed-on: https://gem5-review.googlesource.com/7350 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
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