Searched hist:7349 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/arm/
H A Disa_traits.hhdiff 7349:8b4564729c81 Wed Jun 02 01:58:00 EDT 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Move PC mode bits around so they can be used for exectrace
H A Dmiscregs.hhdiff 7349:8b4564729c81 Wed Jun 02 01:58:00 EDT 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Move PC mode bits around so they can be used for exectrace
/gem5/src/cpu/
H A Dexetrace.ccdiff 7349:8b4564729c81 Wed Jun 02 01:58:00 EDT 2010 Ali Saidi <Ali.Saidi@ARM.com> ARM: Move PC mode bits around so they can be used for exectrace
H A DBaseCPU.pydiff 12434:715d029898f4 Mon Jan 08 22:08:00 EST 2018 Gabe Black <gabeblack@google.com> cpu: Make the CPU's TLB parameter a BaseTLB.

This is instead of the architecture specific version.

Change-Id: I906ec16eee1f65f0e9b9c24b401430f9ea01637b
Reviewed-on: https://gem5-review.googlesource.com/7349
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

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