Searched hist:6807 (Results 1 - 4 of 4) sorted by relevance
| /gem5/src/arch/mips/ | ||
| H A D | registers.hh | diff 6807:14fbdb0f9585 Thu Dec 31 15:30:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Create an artificial control register to hold the thread pointer. In Linux, the set_thread_area system call stores the address of the thread local storage area into a field of the current thread_info structure. Later, to access that value, the program uses the rdhwr instruction to read a "hardware register" with index 29. The 64 bit MIPS manual, volume II, says that index 29 is reserved for a future ABI extension and should cause a "Reserved Instruction Exception". In Linux (and potentially other ISAs) that exception is trapped and emulated to return the value stored by set_thread_area as if that were actually stored by a physical register. The tp_value address (as named in the Linux kernel) is ironically stored as a control register so that it goes with a particular ThreadContext. Syscall emulation will use that to emulate storing to the OS's thread info structure, and rdhwr will emulate faulting and returning that value from software by returning the value itself, as if it was in hardware. In other words, we fake faking the register in SE mode. In an FS mode implementation it should work as specified in the manual. |
| /gem5/src/arch/mips/isa/ | ||
| H A D | operands.isa | diff 6807:14fbdb0f9585 Thu Dec 31 15:30:00 EST 2009 Gabe Black <gblack@eecs.umich.edu> MIPS: Create an artificial control register to hold the thread pointer. In Linux, the set_thread_area system call stores the address of the thread local storage area into a field of the current thread_info structure. Later, to access that value, the program uses the rdhwr instruction to read a "hardware register" with index 29. The 64 bit MIPS manual, volume II, says that index 29 is reserved for a future ABI extension and should cause a "Reserved Instruction Exception". In Linux (and potentially other ISAs) that exception is trapped and emulated to return the value stored by set_thread_area as if that were actually stored by a physical register. The tp_value address (as named in the Linux kernel) is ironically stored as a control register so that it goes with a particular ThreadContext. Syscall emulation will use that to emulate storing to the OS's thread info structure, and rdhwr will emulate faulting and returning that value from software by returning the value itself, as if it was in hardware. In other words, we fake faking the register in SE mode. In an FS mode implementation it should work as specified in the manual. |
| /gem5/src/cpu/checker/ | ||
| H A D | cpu.cc | diff 9176:6807aa361e80 Tue Aug 28 14:30:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Checker: Fix checker CPU ports This patch updates how the checker CPU handles the ports such that the regressions will once again run without causing a panic. A minor amount of tidying up was also done as part of this patch. |
| H A D | cpu.hh | diff 9176:6807aa361e80 Tue Aug 28 14:30:00 EDT 2012 Andreas Hansson <andreas.hansson@arm.com> Checker: Fix checker CPU ports This patch updates how the checker CPU handles the ports such that the regressions will once again run without causing a panic. A minor amount of tidying up was also done as part of this patch. |
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