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/gem5/src/mem/ruby/slicc_interface/
H A DRubySlicc_ComponentMapping.hhdiff 6467:5670eee2a866 Tue Aug 04 01:52:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers

This changeset contains a lot of different changes that are too
mingled to separate. They are:

1. Added MOESI_CMP_directory

I made the changes necessary to bring back MOESI_CMP_directory,
including adding a DMA controller. I got rid of MOESI_CMP_directory_m
and made MOESI_CMP_directory use a memory controller. Added a new
configuration for two level protocols in general, and
MOESI_CMP_directory in particular.

2. DMA Sequencer uses a generic SequencerMsg

I will eventually make the cache Sequencer use this type as well. It
doesn't contain an offset field, just a physical address and a length.
MI_example has been updated to deal with this.

3. Parameterized Controllers

SLICC controllers can now take custom parameters to use for mapping,
latencies, etc. Currently, only int parameters are supported.
H A DRubySlicc_Util.hhdiff 6467:5670eee2a866 Tue Aug 04 01:52:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers

This changeset contains a lot of different changes that are too
mingled to separate. They are:

1. Added MOESI_CMP_directory

I made the changes necessary to bring back MOESI_CMP_directory,
including adding a DMA controller. I got rid of MOESI_CMP_directory_m
and made MOESI_CMP_directory use a memory controller. Added a new
configuration for two level protocols in general, and
MOESI_CMP_directory in particular.

2. DMA Sequencer uses a generic SequencerMsg

I will eventually make the cache Sequencer use this type as well. It
doesn't contain an offset field, just a physical address and a length.
MI_example has been updated to deal with this.

3. Parameterized Controllers

SLICC controllers can now take custom parameters to use for mapping,
latencies, etc. Currently, only int parameters are supported.
/gem5/src/mem/ruby/system/
H A DDMASequencer.ccdiff 6467:5670eee2a866 Tue Aug 04 01:52:00 EDT 2009 Derek Hower <drh5@cs.wisc.edu> slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers

This changeset contains a lot of different changes that are too
mingled to separate. They are:

1. Added MOESI_CMP_directory

I made the changes necessary to bring back MOESI_CMP_directory,
including adding a DMA controller. I got rid of MOESI_CMP_directory_m
and made MOESI_CMP_directory use a memory controller. Added a new
configuration for two level protocols in general, and
MOESI_CMP_directory in particular.

2. DMA Sequencer uses a generic SequencerMsg

I will eventually make the cache Sequencer use this type as well. It
doesn't contain an offset field, just a physical address and a length.
MI_example has been updated to deal with this.

3. Parameterized Controllers

SLICC controllers can now take custom parameters to use for mapping,
latencies, etc. Currently, only int parameters are supported.

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