Searched hist:4336 (Results 1 - 4 of 4) sorted by relevance
/gem5/src/arch/x86/isa/formats/ | ||
H A D | multi.isa | diff 4336:bd6ab22f8e11 Wed Apr 04 10:31:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: MicroOp: A single operation actually implemented in hardware. MacroOp: A collection of microops which are executed as a unit. Instruction: An architected instruction which can be implemented with a macroop or a microop. |
/gem5/src/arch/x86/isa/ | ||
H A D | main.isa | diff 4336:bd6ab22f8e11 Wed Apr 04 10:31:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: MicroOp: A single operation actually implemented in hardware. MacroOp: A collection of microops which are executed as a unit. Instruction: An architected instruction which can be implemented with a macroop or a microop. |
H A D | microasm.isa | diff 4336:bd6ab22f8e11 Wed Apr 04 10:31:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: MicroOp: A single operation actually implemented in hardware. MacroOp: A collection of microops which are executed as a unit. Instruction: An architected instruction which can be implemented with a macroop or a microop. |
/gem5/src/arch/x86/isa/decoder/ | ||
H A D | one_byte_opcodes.isa | diff 4336:bd6ab22f8e11 Wed Apr 04 10:31:00 EDT 2007 Gabe Black <gblack@eecs.umich.edu> Reworking how x86's isa description works. I'm adopting the following definitions to make figuring out what's what a little easier: MicroOp: A single operation actually implemented in hardware. MacroOp: A collection of microops which are executed as a unit. Instruction: An architected instruction which can be implemented with a macroop or a microop. |
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