Searched hist:3480 (Results 26 - 28 of 28) sorted by relevance
| /gem5/util/tlm/src/ | ||
| H A D | sc_master_port.cc | 12047:8b269268312c Mon May 22 18:48:00 EDT 2017 Christian Menard <christian.menard@tu-dresden.de> misc: Reorder sources in util/tlm and rewrite build scripts * Use one SConstruct to build everything instead of one SConstruct for each example. * Introduce SConscripts for sub-directories. * Build in 'build' instead of the source tree. * Build and link to SystemC from the ext/systemc directory. This ensures that SystemC does not need to be installed on the host and avoids possible issues caused by an incompatible SystemC build. * Update the README and add some minor fixes Change-Id: I641ed94f542626864fb7af499ad1be8fd4ad929f Reviewed-on: https://gem5-review.googlesource.com/3480 Reviewed-by: Matthias Jung <jungma@eit.uni-kl.de> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/util/tlm/ | ||
| H A D | README | diff 12047:8b269268312c Mon May 22 18:48:00 EDT 2017 Christian Menard <christian.menard@tu-dresden.de> misc: Reorder sources in util/tlm and rewrite build scripts * Use one SConstruct to build everything instead of one SConstruct for each example. * Introduce SConscripts for sub-directories. * Build in 'build' instead of the source tree. * Build and link to SystemC from the ext/systemc directory. This ensures that SystemC does not need to be installed on the host and avoids possible issues caused by an incompatible SystemC build. * Update the README and add some minor fixes Change-Id: I641ed94f542626864fb7af499ad1be8fd4ad929f Reviewed-on: https://gem5-review.googlesource.com/3480 Reviewed-by: Matthias Jung <jungma@eit.uni-kl.de> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/configs/common/ | ||
| H A D | Simulation.py | diff 3480:c1ec938d2920 Wed Nov 01 11:49:00 EST 2006 Lisa Hsu <hsul@eecs.umich.edu> make it so that you can do a standard switch without the caches option. this will have only the o3 cpu have a cache, rather than timing (warmup) + o3 have cache. |
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